0 0 0 1 1 0 1

No parity bit 7 set to 0 no parity bit 7 set to 1 The 6802's E output is divided by 100 by the dual CMOS counter 4518 at location A2 to provide a 9-6KH2 interrupt source. This clock is connected to the PIA's CA1 pin which in turn is programmed to generate an interrupt to the MPU. This is used by the software in determining the serial output baud rate. 3-2 PTA, VOLTAGE REGULATORS, CLICKER AMD HS-232C SIGNAL ( refer to drawing IKB1-02). 3.2.1 Parallel Interface Adapator (PIA) The two 3 bit ports...

1

The FAIRLIGHT Graphics Monitor is a high resolution CRT monitor for use with the Fairlight range of microcomputers. It is designed to accept composite video from the Graphics Lightpen Card Q219 and interface the lightpen. The Q219 card is located in the microcomputer mainframe. The display tube is a high-resolution 15 diagonal P3T type which gives a crisp, green image. The large format results in a highly readable display, which means low operator fatigue. An optional high-performance Light Pen...

10

KEYBOARD DISPLAY AND KEYPAD MODULE, CMI-12 The Display and Keypad Module provides a simple user interface with the CMI from the master music keyboard. A 16-switch keypad is scanned by the Keyboard Controller for commands to be sent to the CMI and a 12 digit LED display receives simple messages from the CMI to the user. This section describes the operation of the CMI-12. 6.1 DISPLAY AND KEYPAD OPERTION (Refer to drawing CMI-12-01) The DL-14T6 LED display modules, containing four digits each,...

11 Picture Tube Handling

CIRCUIT ADJUSTMENT 5.1 PRELIMINARY SET-UP 5.2 POWER SUPPLY CARD,VDU03 6 5.2.1 24V adjust 5.3 MAIN CARD, yD J01 5.3.1 Horizontal Frequency 6 5-3.2 H. Phase 5.3.3 H. Linearity 6 5.3.4 Vertical Frequency 6 5.3.5 Vertical Height & Linearity 7 5.3-6 Focus Adjustment 5.4 CRT CARD, VDU02 5.4.1 Black Level 6. DISASSEMBLY 6.1 TOP COVER REMOVAL 6.2 PICTURE TUBE REPLACEMENT 8 7. LIGHT PEN 7.1 GENERAL DESCRIPTION

113dmc015 masterslave keyboard subassembly

1 G5156 KEYBOARD MUSIC 73 KEYS 2 G5154 BRACKET A N K BD MTG 4 G518T RETAINER SPRING MUSIC K BD 5 G5158 SPRING KEYBOARD MUSIC 6 MCM11A CARD K BD MUSIC 24SW 7 MCM11B CARD K BD MUSIC 25SW 8 H0122 SCREW 6BAX3 4 CHD 9 H0012 WASHER STAR 6BA 1 G0030 COVER MUSIC SLAVE WOOD BEIGE 2 G0029 PANEL MUSIC SLAVE BASE BEIGE 3 35156 KEYBOARD MUSIC 73 KEYS 4 G0105 STRIP CLAMP MUSIC K BD. 5 G0002 CHEEK SLAVE LH B K 6 G0003 CHEEK SLAVE RH B K 7 MC014 SLAVE KEYBOARD INTERFACE CARD 3 MC019 CABLE MUSIC SLAVE K BD...

143 Mainframe Rear Panel Drawing Dmc038

REF.NO PART NO DESCRIPTION REMARKS 02 H0213 NUT DRESS KEY SWITCH 03 D8014 KEY SWITCH YALE 04 D6709 CONNECTOR CAN PANEL LINE 3S 05 D6736 CONNECTOR CAN PANEL LINE 3P 06 D6739 CONNECTOR CAN PANEL 7S 07 D6731 LUG DMINI LOC LATCH 09 D6721 CONNECTOR PANEL 5P 10 D6710 CONNECTOR PANEL 5S 11 H0016 WASHER HEAD PHONE SOCKET 12 05410 HOLDER LAMP 01030AC 13 G5412 BEZEL RED 012319 AC 15 G5190 TOP FUSE HOLDER B K 16 D6720 CONNECTOR PANEL 3P 17 D6719 CONNECTOR PANEL 3S 19 G0079 ESCUTCHEON C.M.I REAR PANEL 22...

145 Transformer End Plate Drawing Dmc046

REF.NO PART NO DESCRIPTION ' REMARKS 01 G0051 PLATE C.M.I C CAGE L.H.AND 02 G0066 BRACKET C.M.I AC CONNECTOR 03 G0054 BRACKET C.M.I CAP MTG.AND. 04 G5167 TXFORMER C.M.I 1 ALKAY 05 G5205 CLAMP CORD UTH906 06 G0052 BRKT C.M.I CAP MTG TOP AND 07 G0053 BRKT C.M.I CAP MTG BOT AND. 08 C7& 11 CLIP CAP ELECT SIZE 16 09 G5223 CONNECTOR UTM3191.6R 10 G5222 CONNECTOR UTM3191.6P 11 G5122 CLIP CABLE GREY 3M 12 D2003 RECTIFIER BRIDGE MDA3504 13 G0064 BRACKET C.M.I C CAGE FUSES 14 G5309 HOLDER FUSE FLUSH...

15 11 1 0

RUN Run tests on all active interrupts. Both sequential test (one interrupt at a time) and simultaneous test (triggered simultaneously, arrival checked for correct priority) will be run unless the SEQ or SIM commands have been used. See below. Run will be aborted if error count is exceeded or if the user hits CNTRL ESC (break). REPEAT n Sets the repeat count to n. The original value is printed. A repeat count of zero will continue Indefinitely until aborted. ERROR n Sets maximum error count for...

2

C n Channel number Range 1-8, default 1 (always used) R n Audtype AD Run Continuous 16kHz AD Run Continuous 30.2kHz These tests are the same as the AD tests except that sampling continues indefinitely to assist in debugging problems discovered by AD. purpose AD conversion display. Options C n Channel no. Test No.1 Display Routine This simply sets up the specified channel to play back the sampled waveform last recorded by AD or ADCHK. Monitor it at TP6 or the...

21 Master Keyboard Disassembly

(Refer to drawings DMC-004C and DMC-004B) (1) Switch off CMI power and remove all cable connections to the keyboard. (2) Place keyboard upside-down on a soft surface. (3) Remove the six screws marked A and the five screws marked 3 on the drawing DMC-004C from the bottom panel of the keyboard. Do not remove any screws other than these from the bottom panel at this stage. (4) Return the keyboard right way up and remove the five back panel screws > attaching the wooden cover to the panel, marked...

23 Slave Keyboard Disassembly And Reassembly

To remove the wooden cover and the CMI-11 switch modules from a 3lave keyboard, follow the same procedures as specified for the master keyboard in sections 2.1.1 and 2.1.3 respectively. 2.3.1 Removal of CMI-14 Slave Interface (Refer to drawing DMC-005) (1) With CMI power off, remove the flat Gable connecting the master- and slave keyboards, if not already done. CAUTION Always turn off CMI power to the master keyboard before connecting or disconnecting the external cable between the master and...

3125

The precotnpensation value is normally set to 0 on inner and outer tracks. It is more important on inner tracks as the bit density on the disk is greater. W4 selects minifloppy drives and also requires the board to be made with a 34 pin connector (or a special cable) and an 8MHz crystal. The serial data stream that comes from the drive is in a synchronous form. It has embedded the required data as well as clock pulses and syncronization marker bytes. The data separator is used to generate the...

32 Subsystem Nonsubstitution

SYSTEM INTERCONNECTION CABLES 8 4.1 Mains Cable MC068 (l.E.C.) 4.2 Graphics Terminal Power MC067 (l.E.C.) 9 4.3 Graphics Terminal Signal MC065 9 4.4 Music Keyboard Power MC064 4.5 Music Keyboard Signal MC060 4.6 Alpha-numeric Keyboard Power Signal MC013 11 4.7 Slave Keyboard Power Signal MC059 11 4.8 Printer MC062 4.9 Phones 4.10 Monitor 4.11 Channels 1 to 8 4.12 Mixed Line Out 4.13 Sync 4.14 Filter Output 4.15 Mic In 4.16 Line In 4.17 ADC Direct 5. REPAIR...

34 Mechanical

Dimensions Width 750 mm Depth 450 mm Height 320 mm This section describes the operation of each of the circuit boards used In the C.M.I, mainframe. The information is presented primarily to give service personnel a thorough understanding of the operation of the system as an aid to fault diagnosis to the board level. Once the faulty board has been identified, it is recommended that the Mainframe be repaired by board exchange. The faulty item should be returned to Fairlight Instruments for...

34 Slave Keyboard Malfunctions

Failure of groups of keys or individual diagnosed following the same guidelines keys oh the slave keyboard can be as for the master keyboard. However two additional possible sources of faults exist the cable from the master keyboard to the 3lave, and the CMI-14 slave interface. Since the slave scan address lines are the same as the master 3can address lines, faults in the slave keyboard which corrupt those lines can cause the master to malfunction. Section 7.1.1 describes the use of the 4-pole...

4

Access to these locations for initialization of the mapsel is decoded by IC 1B, along with the peripheral enable input PENBIN. The output of IC TB is latched on rising BRA by IC 4A (drawing Q256-03) to produce LFC4X. Writing to the mapsel RAM is the most time-critical of all operations on the Q256. Normally the entire current data phase is available to generate the map selection number for the next cycle but when writing, the current data phase must be used to write to the mapsel ram as well....

4000 43ff 5000 53ff 9000 9400 Ao00 A400 B000 B400 Fc00 Ffff

Internal RAM. 23 bytes only used, for software variable storage. Active key input AD nonv. input pia (K34) Key address output ia (F34) Alpha-numeric keyboard comms. ACIA (C67) CMI communications ACTA (D67) Software readable switch External ram 1(l67 n67) External RAM i 2 (K67, M67, not normally Installed) ROM 1 CJ6 , not normally installed) ROM 2 (HI67, not normally installed) The six-pole dual-in-line (DIL) switch SW4 provides adjustment to the sensitivity of the analog controls. It is read...

41bottom Cover Removal

Disconnect the Power Signal cable from the 2. Place keyboard face down on smooth surface. 3 Using 'locking type' bladed screwdriver, remove the 4 screws from the base cover. Access is gained through the 4 clearance holes in the bottom cover. 4. Lift off the cover and slide the cord grip out from the bottom cover cutout . 1. Remove bottom cover as in 4.1. 2. Spread cord grip open to release cable. 3- Remove the cable from the Printed Circuit Card by spreading the connector locking lugs apart....

44 Software Loop And Interrupt Routine

A useful clue when fault finding ROM-based equipment such as the CMI-1C 13 the main software loop which the processor normally executes in the steady state that state which exists after a successful power-on initialisation, but before any special functions have been called upon by key presses, changed A D values., etc. This software loop may also be referred to as the idle loop. Knowledge of what happens in the idle loop allows a service person to establish, for example what peripherials are...

444 Dma Logic

Data requests from the 1791 or Device Driver ROM loading are synchronised with Processor 2 Phase 2 using flip-flops C1 and A10. This sets up a DMA request to the processor (RDMA). DMA cycles are granted by ACK acknowledge signal. Flip-flop A11 only allows a DMA cycle to occur every second Processor cycle (the floppy drive can not transfer at that rate but this is a system constraint on other DMA devices in the DMA daisy chain). The DMA daisy chain is controled by ENL and EDL. Respectively these...

45

Remove the Printed Circuit Card as In 4.3. 2. Place the card down on a flat surface with the keytops facing Upwards. 3- Locate the EPROM near the heat3ink bracket, refer to exploded view 4. NOTE THE POSITION OF PIN 1 ON THE EPROM WITH RESPECT TO ITS SOCKET BEFORE REMOVING THE EPROM. USE THE EPROM'S LABEL AS YOUR GUIDE TO THE POSITION OF PIN 1. Carefully lift out the EPROM from its socket. 5* To replace the EPROM, position its pins over its socket NOTE POSITION OF PIN 1 BEFORE INSERTING and...

45 Keyswitch Module Removal

1 - Remove the bottom cover as in 4.1. 2. Remove the keytop from the module being replaced and as many adjacent buttons as required to allow adequate working space. The keytop can be removed by pulling or prying upward with a padded tool from their under side. FAIRLIGHT INSTRUMENT recommends to use the 'Keytop Puller' tool,(Part SW-10485). Refer to figure 1. The FAIRLTGHT Intelligent Alpha-Numeric Keyboard has been designed to be used as the primary input console for the Fairlight range of...

452 Video Timing Logic

All timing is derived from a crystal oscillator and a counter chain. The dot clock is constucted around inverter F2 and the 10.38Mhz crystal. The string of counters at F9 to F11 and Ell to El3 count the dotclock dotclk and with the aid of SROM produce all video related signals. The screen area is organized as 84 bytes on the line and 304 lines in the frame. The actual displayed area is 64 bytes on the line and 256 lines. One byte time is 8 DOTCLK pulses or 770ns. The SROM prom at E10 generates...

47

Mains Neutral, Active and Ground. A.C. Mains supply to Graphics Terminal. Switched by key 3witch on mainframe. This supply is always the same as the local mains potential. Video signal to Graphics Terminal and Light Pen signals to mainframe. Connector Type Cannon 5-pin. Lightpen Hit. T.T.L. level, asserted low. On oscilloscope, appears as a series of low-going pulses about 1uS wide, repeated every 20mS, when the pen is pointed at a bright area of the screen. See figure 8.3a. Lightpen...

481 Introduction

The Audio Module interfaces the audio input output connectors on the rear panel of the C.M.I, mainframe with the appropriate internal circuitry. Functions include buffering of audio outputs from the channel cards generation of a mixed line output, provision of a monitor amplifier for driving a monitor speaker or headphones, processing of sync input and output signals, and supply of power to the channel cards. Audio from the channel cards arrives at the Audio Module by means of a fifty-way...

493 Regulator 5 Volt 18

This regulator is part of the regulator assembly located at the rear of the C.M.I. Card Cage. IC1 is the regulating element of the circuit. Transistor Q2 senses the current drawn by IC1, driving parellel transistors Q3 to Q6. Equal current sharing is ensured by emitter resistors R7-R10. Current limiting is provided by germanium transistor Ql, which uses the drop across sensing resistor R1 as a current sense. Short circuit current is limited to approximately 20 Amps, regulation falling off above...

500r 82r

The signal appears on pin 2 of connector 3. First it is DC isolated by C1 and R1. It is then sent in two directionsone is to the sync separator which we will treat later. The other is to the contrast pot via pin 4 of P3. This divides the signal down to set the size of the luminance signal as desired. This signal then returns thru pin 6 of P3 to pas3 into the buffer stage. It is rare to encounter problems at this stage.

63

V floating heater supply, and passes to the tube support card via P5 pins 2 and 3. R49 limits the current. To check the operation of the heater, look for the glow towards the back of tube neck. This combines the video and blanking signals and provides an output stage to drive the cathode. It also supplies and limits the necessary voltages to the rear of the tube Video output blanking '. '. Supplies signals

64 Q256 Memory Card Diagnostics Software

When testing system memory it is desirable to have as little memory space as possible taken up by the operating system and the memory test itself. In order to restrict the memory diagnostics within a 16K block, they are split into three separate programs M0 256, MAP256 and DMA256. The first performs bulk memory testing in 16k chunks and exercises the parity generation checking system. MAP256 tests the full capability of the memory management system, except for the automatic DMA map selection,...

642 Mem256

MEM256 performs the bulk memory data and addressing tests, refresh and parity system tests. Purpose Checks both processors' abilities to write rapidly varying data throughout memory. In each test, the SELected blocks are mapped one at a time into 4000 to 7FFF and a semi-random data sequence written by either or both processors in an order as specified below. Each processor then checks its own data. Test no.1 PI ODD UP, P2 EVEN UP PI writes to all odd locations starting from 4001 and proceeds...

643 Map256

This section describes MAP256 VI - 6 Test name MAP . No. tests 15 Purpose Tests the mapping functions of the 0256. Test no. 1 PAGE UNIQUENESS - P2 Test no. 2 PAGE UNIQUENESS - P1 Options 0 n1,n2 n4 OSBLK Operating system block These tests check that each 2K physical page (there are 128 on each Q256) can be accessed uniquely. The general approach is to write each page with its own page number, and then verify them all to ensure no page overwrote another. Getting around the operating system...

69

DAC Output swing, tests Ns2,3 0 to 5.6 0 to 1.88 0 to 2.6 Test N 4, Filter Distortion (VR2) Option R - channel card Revision Range 1-3 default 3- Reraove the short between TT10 and TT8 for this test. Second harmonic distortion in the CEM 3320 VCF (Revs 1 and 2 only) is minimised by adjusting the resonance control bias. The adjustment is made using a sine wave signal in the pass band of the filter, I.e. well below cutoff. A dummy sound Is played by the channel card at zero pitch, envelope and...

81 General Description

8.2 Circuit Description 7.1 DMKB2 ALPHA NUMERIC KEYBOARD MODULE Drawing ref. Part ii. Description. 3 G0042 Switch Module 4B3S 4 G4008 Support Module St) 10433 5 G4009 Tension bar 7 . 34006 Switch Module 6AID 8 34005 Switch Module 4AIS 9 G4004 Switch Module 6B1D 10 34003 Switch Module 4B1S 11 H0123 Screw 6BAx1 CHD 12 H0201 Nut 6BA Hex. 13 T H0110 Screw 4BAx1 4 nylon 14 H0202 Nut 4BA Hex. 15 H0002 Washer Mica T0220 7.2 DMC003 ALPHA NUMERIC KEYBOARD ASSEMBLY 3 G1017 Top cover 5 D6753 Cover...

8yw96s

C33 1 uF C54 100 nF C55 100 uF 40 V Here is what can be called the heart of the circuit, as so much depends on its proper operation. The horizontal flyback transformer drives not only the horizontal trace, but all the HT supplies, the EHT for the tube anode and the heater supply. It also does all this from a single 24 V supply. Q10 is set up as a switch between ground and one end of TX1's primary. The other end of the primary is connected via D8 and C33 to a decoupled 24 V supply. When Q10 is...

942 Audio Board Replacement 161

9.5 TOP COVER REMOVE REPLACE 9 6 SIDE COVER REMOVE REPLACE 9.7 BOTTOM COVER REMOVE REPLACE 9.8 DISK DRIVE REMOVE REPLACE 9.8.2 DISK DRIVE REPLACEMENT 9.9 FAN ASSEMBLY REMOVE REPLACE 9.10 CARD CAGE REMOVE REPLACE 9.10.1 CARD CAGE REMOVAL 9.10.2 CARD CAGE REPLACEMENT 9.11 REGULATED POWER SUPPLY ASSEMBLY REMOVE REPLACE 166. 9.11.1 REMOVAL 9.11.2 REPLACEMENT 9.12 MOTHERBOARD REMOVE REPLACE 9.12.1 REMOVAL 9.12.2 REPLACEMENT 9.13 TRANSFORMER END PLATE REMOVE REPLACE 1 69 9.13.1 REMOVAL 9.13.2...

Ad

6,8.3 Comprehensive Analog Test Chain test name ANALOG To check all analog functions of the CMI channel cards, master card, and audio card. This test is most conveniently used with the Analog Tester box connected to the rear panel of the CMI as labelled. Some cables need to be arranged slightly differently from normal. To make the changes, eject the disk(s), and turn power off first. (1) Keyboard Power cable, normally connected from the CMI to the Music Keyboard, should go to the analog tester....

Adclk

* A 2-way link option is provided on the CMI-25 motherboard whereby a Q096 64K memory card may be installed instead of the Q256, provided an old revision (Rev 5) master card Is used. The default linking on the motherboard connects pin 63A of a Rev 6 master card (PENB Input) to the Peripheral Enable output of the Q256. On an old master card, pin 63a is the Video Ram Enable (VRAMEN) output which connects via the non-default link, to the Graphics Controller VRAMEN input. The Q096 RAM card is not...

Byv96e

This section removes non-luminance information from the video signal during horizontal retrace. The horizontal blanking signal is extracted from the horizontal flyback pulses by D5, R9, R10 and R15. Each pulse turns Q4 on, which clamps the video signal via D1. The blanked video is then buffered by emitter follower Q3. R13 in series on the output corrects the impedance and protects the buffer. There is an optional link for selecting an external luminance signal (no sync). The selected signal...

C11

12 V supply to Q5, decoupled by C5. 7.5 V ref. to Q6, generated from 12 V by 85 V supply to cathode chain, decoupled Brightness control voltage, bypassed by 400 V (G2) supply via R33 and C11. Focus voltage via R24. R17, D4 and C7. by R21, C8 and C9. C10. Incorporated into the board layout is a ground ring around the tube connections. If any voltage goes dangerously high , the excess energy will arc over and be dissipated.

Cb2

Buffered through G23 to address to provide CMI-11 switch module addresses CMI-12 keypad mutiplexor addresses LED display module data Data inputs to flip-flops (G4) which switch control button lamps. Analog control input multiplexor addresses. Scan Not Done (SCND) timing flag input Strobe output to update lamp flip-flops LED display digit select lines LED display all-segments-on (cu) and module select (cs) signals. Input flag from keypad multiplexor. Does not generate...

Cd

14 1 C.M.I MAINFRAME DRAWING REF.DMC0001 REF.NO PART NO DESCRIPTION REMARKS 01 G0036 PANEL C.M.I TOP BEIGE 02 MC038 PANEL C.M.I REAR BEIGE 03 G0035 PANEL C.M.I SIDE BEIGE 04 G0050 PANEL C.M.I BOTTOM BEIGE 05 G0069 PANEL SUPPORT BASE 06 G0090 STRIP C.M.I FRONT B KG B K 07 G5054 DISK DRIVE LEFT (0) 08 G5055 DISK DRIVE RIGHT (1) 09 G0089 PANEL C.M.I FRONT 12- G0086 , C CAGE RAIL M BRD UPPER 13 G0033 PLATE DISK DRIVE TOP 14 G0034, PLATE DISK DRIVE BOTTOM 15 G0082 BRACKET CARD CAGE SUP TOP 16 G0081...

D10

*iM5 High voltage type (blue) IMS' High voltage type (blue) This is a +800 V supply derived from the winding between pins 6 arid 7, rectified by R50 and D10. The G2 -t-400 V supply is divided down by special high voltage resistors R54 and R56, passing to the tube support card via PS pin 7. The focus adjust pot is connected directly across the -t-800 V supply. The static focus voltage is mixed thru R57 with the dynamic focus signal at 031, the composite then passing to the tube support card via...

Data Register At Address Register At Status Register At

FC5B (write only) ( HDAD ) FC5B (read only) (HDST ) The following registers are accessed by writing the required registers address to the address register, HDAD, and then accessing the data register. The first 8 locations are in the Western Digital controller and the rest are in the Q077. Data register Error register Sector Count Sector Number Cylinder low Cylinder high Size Drive Head Status Register DMA address low DMA address high control register lower partial sector byte count (inverted)...

Dii

Replay sampled waveform C n Channel no. Test No.1 Display Routine The contents of the RAM buffer are moved to the specified channel card memory and the channel set running until < CNTRL-ESC> is typed. Monitor the waveform at TPS. It should be a low frequency triangle. This test allows a quicker check of sampled data than DBI. Both display routines are only necessary for debugging as the ADI test itself checks if sampled data is correct. Test No. 1 2 Jam and -Jr.jam Purpose Checks correct...

Dmc004c

1 G0023 COVER MUSIC WOOD BEIGE 2 G0027 PANEL MUSIC BASE BEIGE 3 H0114 SCREW 6GX1 2 PAN 4 H0127 SCREW 4BAX3 4 CHD 11.2 DMC004 MASTER KEYBOARD ASSEMBLY 1 G0027 PANEL MUSIC K BD BASE MECHAISM ASSY 9 G0105 STRIP CLAMP MUSIC K BD 11 G0024 STRIP SLIDER POT 12 35161 POT SLIDER 13 G0025 CHEEK RH MASTER V 14 G5165 BEZEL DISPLAY RED 15 MCMI12 CARD MUSIC DISPLAY 16 G5142 SPACER 6BAX1 4 ROUND 17 D6738 CONNECTOR CANNON 7 18 D6710 CONNECTOR CANNON 5S 19 D6729 CONNECTOR DMINI 25S 20 D6727 CONNECTOR DMINI 9S...

Fcxx

MIDI IRQ (CMI-08 only) 0 P SMPTE MIDI IRQ (CMI-28) 0 P Port select I P * The CMI-08 board only generates the MIDINT interrupt which is connected to the PI level 0 IRQ input on the Master card, along with the ACIA IRQ from the Q133. The CMI-28 board only generates the SMIDINT interrupt which is connected to the PI level 3 IRQ input on the Master card, along with the P1 IPI interrupt from the processor card. The B-side signals on pins 67-69 are duplicates of the corresponding signals on side A,...

Figure

2.1.2 Removal of CMI-10 Keyboard Controller (Refer to drawing DMC-004) (6) Remove all cable connections to the CMI-10 module. (7) Unscrew three nuts and bolts attaching the CMI- 10 s heatsink to the back panel. (8) Six plastic standoffs secure the module to the base of the keyboard. With a small screwdriver, press the catch of each standoff while gently prising the module up. (9) Lift the module off the standoffs. 2.1.3 Access to Keyboard Switch Mechanism (Refer to drawings DMC-004C and...

Functional Descriptional

4.11.1 INTRODUCTION 4.11.2 ADDRESS MAP 4.11.3 COMMANDS 4.11.4 DMA ADDRESS COUNTERS 4.11.5 DMA BYTE TRANSFER COUNTERS 4.11.7 ADDRESS DECODING, CONTROLLER 4.11.8 DMA LOGIC 4.11.9 CONTROL REGISTER 4.11.10 DEVICE DRIVER ROM 4.12 CMI28 GENERAL INTERFACE FUNCTIONAL DESCRIPTION 57 4.12.1 INTRODUCTION 4.12.2 MEMORY CONFIGURATION 4.12.3 68000 6809 DMA BUSS INTERFACE 58 4.12.4 DEBUGGING NOTES FOR DMA CIRCUITRY 4.12.5 SMPTE MIDI CARD PERIPHERAL CIRCUITS 4.12.6 INTERRUPTS 4.12.7 SMPTE GENERATING CIRCUITRY...

I

MITSUBISHI FLOPPY DISK DRIVE, M2896-63 SERVICE MANUAL FAIRLIGHT INSTRUMENTS, FEBRUARY 1985 Revision 2.1 ptioning may only need to be done if the disk drive has been returned to a itsubishi service centre. If returned to a.Fairlight service centre, the drive ill be correctly optioned to perform correctly on the C.M.I. ition blocks to be shorted - Mitsubishi M2896-63 Rev G JFC, PS, SE, DC, M2, S2, I, R, IT, MS, ,' MO, RFA, HR, A, HUN, WP, DS, 2S, RM 1 other option blocks to be left open,...

Klt

Increase brightness control until picture background can be seen. 2. Adjust H. Phase control VR4 to centre picture horizontally within background raster. 1. Adjust H. Lin coil L2 to obtain optimum horizontal linearity at the start and end of the horizontal scan. 1. Turn V. Frequency control VR40 until picture starts rolling down the screen and the blanking bar is seen. 2. Slowly turn VR40 back so that bar rolls up and locks in. 3. Turn VR40 a few more degrees to ensure stable locking. 5.3.5...

Info

The Various CPU functions is an 8 bit register in which each bit may be independently written to. This register is at location 6D, and it Is decoded by devices at 9B and 7A. When written to, the bit address is selected by the 3 least significant bits of the data byte. The state of data bit 3 determines whether the bit is set or cleared. The four functions provided per processor from this register are interprocessor interrupt hardware trace map switch select fast interrupt request where P is 0...

Keyswitch Module Removal

Remove the bottom cover as in 4.1. 2. Remove the keytop from the module being replaced and a3 many adjacent buttons as required to allow adequate working space. The keytop can be removed by pulling or prying upward with a padded tool from their under side. FAIRLIGHT INSTRUMENT recommends to use the 'Keytop Puller' tool,(Part SW-10485). Refer to figure 1. 3. Unsolder the 4 terminals of the Key Switch Module from the PCB using a temperature controlled soldering iron set to 750F degrees. Use a...

Memdbgc

The user i3 presented with a menu of tests indicating which parts of circuitry are exercised by each test. Simply type the number of the required test then answer the prompts for data such as which processor is to run the test, what data is to be used, what 16K memory block is to be written read etc. Once all data required for the test is obtained the test loop is entered immediately. The only thing left to do then watch the signals of Interest behave as the test loop requires. In general it is...

Mq21501

14.1 PARTS LIST FOR DRAWING MQ215L 01 Ref No. Part No. Description. 3 .10209 Front Panel Assy. 6 G0073 Power Supply Base Plate 7 G5159 Voltage Selector Switch 8 J0040 Rear Panel Escutcheon 11 D6768 Power Connector 3 pin 12 D6710 Graphics Connector 5 pin 19 MVDU01 Main Card VDII01 21 G5198 Picture Tube 15 23 MVDU03 P.S.U. Card VDU03 27 H0125 Screw 6gx1 4 28 HO102 Screw CHD4BAX 29 H0111 Screw CKS 4BAxl5 l6 30 H0118 Screw CKS6BAx3 8 31 H0115 Screw 4Gx3 8 33 H0133 Screw CHD i BAr1 4 35 H0021 ' .'...

Ov

6.9.2 Channel Card Revs 1 and 2 (CEM Filter) 6.9.2 Channel Card Revs 1 and 2 (CEM Filter) Zero setting -3dB point (16Hz) expressed as binary fraction. Decimal point is placed between D5 and D6 inputs on DAC. (FILTA,14 setting not shown -3dB at 13.4kHz, -6dB at 19.3kHz) Zero setting -3dB point (16Hz) expressed as binary fraction. Decimal point is placed between D5 and D6 inputs on DAC. (FILTA,14 setting not shown -3dB at 13.4kHz, -6dB at 19.3kHz) 6.9.3 Series A Channel Card Rev 3 (SSM Tracking...

Pp

Balanced, 600 ohms input suitable for microphones. When the MIC LINE switch is in the MIC position, this irtput is fed to the Analog to Digital converter. Balanced, 600 ohm line level input. This Input is connected to the Analog to Digital converter when the MIC LINE switch is in the LINE position. Pin 2 INPUT'A. Amplitude of 1.4 volts P-P required for full scale conversion. Pin 3 INPUT B. Amplitude of 1.4 volts P-P required for full scale conversion. Direct input to the Analog to Digital...

R uf 400 v c3o

This section conditions the horizontal drive to ensure linearity and width are correct. The two coils form an adjustable series LC with the capacitors and deflection coils, and the current waveform determines deflection behaviour. Only the linearity coil is adjustable the width coil was found to work better without its tuning slug. Thus there may be small differences in the screen width of different monitors, but this has not been a problem. Faint Vertical stripes on a bright raster would...

R150 R154

Vertical frequency adjust CI39 470 nF This network is required by the vertical combination IC to generate the vertical timebase. It can be separated into four smaller networks as follows Pin 7 RC network (C133y R148) between 24 Pin 10 RC network (R14Q, R150, CI 36) between 24 V and .'.'grid. Pin 13 Parallel RC (R154, C139) to ground, The problems common to this area are similar to those of the horizontal timebase network. The stability of the trace depends on these networks operating correctly...

Under No Circumstances Should Any Force Be Applied To The Neck Of The Tube

If the handling procedures for the tube prior to insertion in the chassis is such that there is a risk of personal injury as a consequence of accidental damage to the tube, then it is recommended that protective clothing should be worn, particularly eye shielding. Fig I.- . Lifting picture tube from edge-down position Fig I.- . Lifting picture tube from edge-down position Fig.2 - Lifting picture tube from face-down position Fig.3Lifting picture tube frpm face-up position Fig.2 - Lifting picture...

Vs

Unregulated power supply to music keyboard (also indirectly supplies alphanumeric keyboard). Pins 1,2 + 10V Return. Return (ground) for + 10V supply. Pins 3,4 + 10V Supply. Unregulated supply, +9 to +11 volts. Pin 5 -20V Supply. Unregulated supply, -18 to -22 volts. Pin 6 +20,-20 Return. Return (ground) for + and - 20 supplies. Pin 7 +20V Supply. Unregulated supply, +18 to +22 volts. Bi-directional serial data between mainframe and music keyboard, including busy flags in both directions. Power...

Wait

Initially, all interrupts are active, I.e., will be tested upon typing the RUN command. Tests can be activated or deactivated using the commands above. Each test begins with the processor interrupt mask set so that interrupts currently pending are ignored. The status registers associated with each active interrupt Is read in order to clear pending interrupts. These status registers generally contain a flag which indicates an interrupt has been generated and at this point the flag should be...

[

Some MAST tests require at least one channel card to be installed In the CMI. These are indicated by the presence of a C option in the descriptions below. This section describes MAST Version 3-12 Test No.1 Master Timer Read Write Latches Purpose Check ability to communicate with timer. and all numbers is followed by a in the same way. Each write read is a double byte transfer through the 8-bit buss. . Test No,2 Master Timer Internal Clock Timeout Purpose Check timeout operation under internal...

441 Introduction

The floppy interface card interfaces the bit parallel serial buss of floppy disk drives to the C.M.I.'s interleaved parallel buss. The interface is a combination of device driver software, controlling disk data format arid initialization of data transfer parameters, and the hardware which carries out the transfers without processor intervention. Data is stored on the floppy disk itself on its magnetic coating, in concentric rings. In a standard, 8 inch floppy there are 77 such rings on each...

The Diskette In The Drive Under Test With

Tests can be run separately or in destructive non-destruct groups by typing as follows - DM,(0 or 1 or B) ,XT< returri> (Do all non-destruct tests) DD,(0 or 1 or B) ,X < return> (Do all destructive tests) ST < tests> ,(0 or 1 or B) ,X < return> where < tests> up to 10 test numbers separated by '-' The extended test option X accumulates error counts over a number of pass es . ESC key will abort test in progress. Typing 0S< return> will return the user to QDOS and reboot...

458 Video Memory Vram

The 16 kilobytes of VRAM is provided by eight 4116 16,384 bit dynamic MOS devices. The timing required for these devices is preset in the system timing signals. These signals are buffered and fed directly to the rams as BRAS* , BCAS* and BCA*. Memory refresh is done in the continuous access for screen refresh. Whenever the VRAM is directly accessed, the decoding at A2, 7D, 7E generates RENB, (active low). This disables the memory card in the 16K block used by VRAM and saves duplicating maps in...

Fairlight Lightpen Connector Gx20

The Light Pen is used to generate co-ordinate data from Hit and Touch signals coming from the light pen. These come onto the card via the lower 10-way connector. It is achieved by latching the bit, byte and line counters in the video chain when a touch and hit occur from the lightpen. The co-ordinates are then available to be read from the card by the processor. The light pen is activated by touching the insulated end of the pen, which generates a Touch signal. The interface can be configured...

19300

Note Fn indicates filter latch bit n Note Fn indicates filter latch bit n Test No.1 - Read-write 0 Purpose Tests memory read-write ability. First the waveform address counters are reset (A4,B3,B4) then the entire memory is written with zeros. The address count is automatically incremented after each write by having LOAD asserted and RUN not asserted. Memory is read back In the same way to verify data. Test No.2 - Read-write FF Purpose Tests memory read-write ability. Writes FF sequentially to...

Channel Outputs Is

The computer section of the C.M.I, houses all the digital control and sound generating hardware. It can he considered a stand-alone operational unit. With nothing connected to it it is possible to start up the system and bootstrap load the disks (BOOT the system). On power-up, EPROMS located on the C.P.U. Control Card Q-133 will control the Boot process. As soon as a disk is placed in the left-hand drive (Drive 0) a special sector known as the Boot Block is read into RAM and executed. The code...

Ctest name[Coption1Coption2

Where the Ctest name> is as described in each section. Options are of the form CO> n where < 0> is a single character and n is an integer. P n Repeat test command n times. Using C instead of an integer initiates continuous testing. N n Select test number n. There are usually several test commands with the same name. By default, all tests are executed sequentially but single tests or subsets of the available tests can be specified. For example N 1 Test no. 1 only ' N 1,3,5 Tests 1, 3 and...

Fairlight Cmi Repair

P2 tests all AIC memory location sequentially and using random test values. The 'FATAL AIC MEMORY ERROR' can be displayed by this phase of the RAM test. PI and the AIC's 6809 write to and read from alternate locations in the top half of AIC memory. PI and the AIC's 6809 write to and read from every 16th pair of bytesv A 100msec time delay is introduced between the read and write to test the AIC refresh The AIC moves it's test program to the top half of AIC memory and PI end the AIC's 6809 test...

4114 Dma Address Counters

Sixteen bit counter chain D1 to D4 Is used to provide the address for DMA transfers. The starting address for each disk transfer is established by writing the appropriate byte address to the address register then writing the address byte to the data register and then repeating for the other address byte. This causes the address to be preset into the DMA address counters by means of parallel-load strobe pulses STAL (low byte) and STAH (high byte). The incrementing of the DMA counters may be...

Cmi System Service Manual Music Keyboard Service Manual Alphanumeric Keyboard Service Manual Graphics Terminal

A 21-slot card cage houses a printed-circuit motherboard carrying edge connectors into which the C.M.I, circuit boards are inserted. The cards can be accessed by hinging down the front panel, and they can removed from the front of the unit without requiring the use of any tools. Cables from the front of each channel card connect to the audio board located inside the rear panel of the mainframe. This card supports a variety of audio functions, including balanced line drivers for the eight...

41 Q209 Dual 6809 Cpu Functional Description

4.1.1 INTRODUCTION 4.1.2 TIMING & MEMORY CONTROL LOGIC 4.1.2.1 Master Timing Signals 12 4.1.2.2 Dynamic Memory Timing Signals 12 4.1.2.3 Data, Address Buss Multiplexing 13 4.1.2.4 Interrupt Strobe Generation 4.1.2.5 Direct Memory A cess 13 4.1.3 CPU MEMORY SWITCHING, & VECTORS 4.1.3.1 Vector-Fetch Decoders 14 4.1.3.2 Processor System Control 4.1.3-3 Automatic Map Switching 4.1.3.4 Hardware Trace 15 4.1.3-5 Indivisable Instructions 16 4.1.3-6 Link Options 4.2 Q133 CPU CONTROL CARD...

4232 Eprom

Four kilobytes of U.V. erasable ROM are volt supply type used. These are 2716 2516, single 5 D4 F800-FBFF 2 Disk boot D5 F400-F7FF Both I O functions monitor 4.2.3.3 ACIA (Asynchronous Communications Interface Adapter) (refer to drawing Q133-02) 6551 ACIAs at E4, E5, E1 , E2, S3 are used to receive and transmit serial data. The BAUD rate is determined internally via internal dividers, from the baud-rate generator master 1.8432Mhz oscilator at D1. Interrupts generated by the ACIAs go to the...

3

Locate the circuit board onto its card cage rails. Component board should be facing towards the right. Clear the path of any connecting cables and slowing slide in the circuit board until it comes into contact with the motherboard edge connnctor. Locate the board into its polarising key on the motherboard. Now firmly push the board into the edge connector. Its ejectors should be in line with the adjacent ejectors. 4. Reconnect any cables that were removed in 9.2.1. 5. Replace the card cage...

7 Signal List Internal Connections 139

7.0 MOTHERBOARD SIGNAL LIST 7.1 COMMON SIGNALS BUSSED TO ALL SLOTS 140 7.2 SLOT 1 MASTER CARD CMI-02 7.3 SLOT 2 GENERAL INTERFACE CARD CMI-28 142 7.4 SLOT 3 TO 10 CHANNEL CARD CMI-01-A 7.5 SLOT 11 ANALOG INTERFACE CARD CMI-07 144 7.6 slot 12 64k system RAM QO96 (not used) 7.7 SLOT 13,14 256K SYSTEM RAM Q256 7.8 SLOT 15 FOUR PORT ACIA MODULE Q 14 7-9 SLOT 16 PROCESSOR CONTROL MODULE Q133 148 7.10 SLOT 17 CENTRAL PROCESSOR MODULE Q209 150 7.11 SLOT 18 LIGHTPEN GRAPHICS INTERFACE Q219 151 7.12...

8 Vdu03 Power Supply Unit

The power supply unit is located behind the front panel Light Pen cut-out. The unit consists of the power transformer, voltage selector switches and the regulated DC power supply card VDU03* The unit provides 24V and 12V for the Main Card VDU01 and 5V for the Light Pen. A multi-tapped primary power transformer is used. It has low magnetic leakage to prevent picture tube interference. The secondary output is connected via 3 pin connector to the Power Supply Card. The bridge rectifier DB1 and the...

Repair Of Raynet Board

Remove the Card Cage assembly, as Ln section 9*10. Remove all of the circuit board black rail guides by bending them until they snap out. Disconnect the DC power wiring loom going to the Regulated Power Supply assembly circuit board from the Transformer End Plate assembly. NOTE AND MARK ALL TERMINAL CONNECTIONS BEFORE THEY ARE UNPLUGGED FROM THE CIRCUIT CARD. Unscrew the six Philips-head screws and four counter-sunk screws securing the End Plate to the card cage support rails. Remove the...

431 Introduction

The q256 is a 256k x 9 bit dynamic RAM, organised as four blocks of 64k and mapped in 2 or 4K chunks. 32 different mappings from processor space to physical memory space may be set up. The mapping selected for any given cycle is automatically switched according to the current machine state. The machine state comprises which processor is on the buss, the user state system state output of the processor, and which DMA channel is active, if any. The ninth bit in the memory is a parity bit. Parity...

484 Power Supply

Raw D.C. supplies of approximately -t- and - 20 volts arrive at the card via connector PL4. When power is first applied, relay RLA is open and no power is fed to the regulator ICs. As capacitor C50 charges, the current through transistor Q8 increases until the voltage accross resistor R108 excedes .7 volts. Transistor Q7 then switches on, pulling the base of Q8 up to the supply, which causes relay RLA to close. Power Is then applied via RLA1 and RLA2 to the regulator ICs IC13 and IC14. The...

GND fPIN

Sync Test Plug Circuit 3-pin Cannon Test No.1 Click Out Sync In 250Hz Time Purpose Checks click output and sync input circuits The first test clocks the Synch In timer timer 2 with a known frequency and checks its timeout against the software reference. During initialisation, timer 1 is checked to be working i.e. that it can be made to time out . It is then programmed for internal clock, and preset to run continuously at 250Hz with its output enabled. Timer 2 receives the sync input pulses and...

8

Pin Pin Pin Pin Pin Pin Pin Pin Pin Pin 10 Pin 11 Pin 12 Pin 13 Pin 14 Pin 15 Pin 16 Pin 17 Pin 18 Pin 19 Pin 20 Pin 21 Pin 22 Pin 23 Pin 24 Pin 25 Pin 26 MIDI out A. 5 volts. MIDI in A. SYNC out 1. MIDI out B. SYNC out 2. MIDI in B. SYNC out 3 MIDI out C. Digital Ground. MIDI in C. Digital Ground. MIDI out D. RESET START. MIDI in D. RUN STOP. SMPTE code in. Digital Ground. SMPTE code out. CLICK out SYNC out 4. CLICK in. CMI29 Analog Ground. CMI28 n c. CMI29 15 volts. CMI28 CMI29 -15 volts....

12 Schematic Diagrams 171

12.1 Q209 DUAL 6809 CPU 12.2 Q133 CPU CONTROL 12.3 Q256 256K MEMORY 12.4 QFC9 FLOPPY DISK CONTROLLER 12.5 Q219 LIGHTPEN GRAPHICS 12.6 CMI02 MASTER CARD 12.7 CMI01-A CHANNEL CARD 12.8 CMI04 AUDIO MODULE 12.9 QPSA POWER SUPPLY 12.10 Q137 FRONT PANEL 12.11 Q077 HARD DISK CONTROLLER 12.12 CMI28 GENERAL INTERFACE 12.13 CMI07 ANALOG INTERFACE 12.14 MAINFRAME WIRING DIAGRAM 13 EXPLODED VIEWS 13-1 TRANSFORMER' END PLATE 13-2 CARD CAGE ASSEMBLY

Graphics Video Memory Module 128 Kilobits

Fairlight Cmi Motorola Schematic

2.1 General Principles Refer to Figure 1 The C.M.I, is a complex special-purpose computer system which embraces many different hardware and software technologies. All processing and sound generation functions are performed by the Mainframe, while the Graphics Terminal and Keyboards serve as peripherals for operator interfacing. The mainframe is capable of operating quite autonomously, that is, it is not reliant on any external connections for proper functioning. Under certain conditions it is...

Aaaa

Fill memory from beginning address to end address User prompt for beginning address User prompt for end address Abort current command line, take no action Close current location, return to sequence start and open Relocate address AAAA by register R. R may be any of the CPU registers, the user relocation register, the monitor flag byte or the currently open location Relocate address AAAA by Relocation Register R Same as linefeed CTRL J except that no new line is taken, and neither the address...

O

Figure 3-1 Printed Circuit Board Option Block Location Under normal circumstances preventive maintenance is not required on the M2896. If severely dirty environments are encountered, an occasional cleaning of the drive may be performed 'to assure continued reliable performance. Only basic corrective maintenance is documented here. If it is determined that a disk drive requires more extensive repairs than are described in this section, return the unit to Fairlight Instruments for service. This...

93 Vertical Section

Like the horizontal section, this provides everything necessary to maintain a sweep on the screen. It can be broken up into the following sections Sync conditioning Vertical oscillator Vertical IC decoupling Output feedback ' Res R137 This network cleans up the sync from either the sync separator or the optional sync input, which is then fed to TDA 2653 pin 2.

417 Adc Direct

Direct input to the Analog to Digital converter when the ADC DIRECT MIC LINE switch is in the ADC DIRECT position. Because this input is Direct Coupled, any D.C. offset on this input will result in a D.C. shift of a sound sample. Connector Type Cannon 3-pin. Pin 1 GROUND Pin 2 GROUND Pin 3 INPUT. Amplitude for full scale conversion is 10 volts P-P. Having isolated the faulty sub-assembly, service personnel should refer to the relevant service manual for further details about that item. Under...

Wd1791

The definitions of the control register bits are 0 DS0 drive select address bit 0 1 DS1 drive select address bit 1 2 enable interrupt active high 3 enable DMA address incrementing active low 4 DMA transfer direction l to disk The definitions of the control status bits are 7 device driver loading active low The extensive instruction set of the 1791 LSI can be obtained from the manufacturers data sheets for the 1791 - This device handles all data conversions between the disk drive and the C.M.I,...

32 Subsystem Checkout Without Substitution

System Interconnection Power System

In many cases the faulty sub-system will have to be identified using only commonly available test equipment. Minimum requirements are a multimeter for measuring volts D.C. and resistance, an oscilloscope, and the usual set of tools such as screw drivers, pliers, soldering iron, etc. The faulty sub-system can usually be isolated by the following tests Unplug keyboard input and try again. If system does not boot, fault is in mainframe. If it now boots, fault i3 in music keyboard, alpha keyboard...

Computer Musical Instrument

David Cilia

PDF format by Jean-BernardEmond amp David Cilia Version 1.0 f vrier 2001 Warning this Service Manual is only for Fairlight Computer Musical Instrument Model IIx For more information about other FAIRLIGHT products and company today CHI SYSTEM SERVICE MANUAL FAIRLIGHT INSTRUMENTS, FEBRUARY 1985 Revision 2.1 1. INTRODUCTION TO C.M.I. MAINFRAME