## 02

This result is close to the theoretical maximum of 25 percent. (b) The maximum possible instantaneous power dissipation in Qi occurs at the midpoint of the load line. Reference to Fig. 5.4 and the load line RL RL2 shows that this occurs for (VCC + IqRl) (10 + 1.86) 5.93 V The corresponding collector current in Q is Ic 5.93IRi 5.93 mA since Ri lkft. Thus the maximum instantaneous power dissipation in Q is This power dissipation occurs for Vce 5.93 V, which represents a signal swing beyond the...

## 03

Figure 5.18 Simplified schematic of the output stage of the 709 op amp. The limiting values that Va can take are determined by the driver stage. When V, is taken large positive, V decreases until saturates, at which point the negative voltage limit V is reached y o -VCC + VC 3(sat) Vbe2 (5.76) For values of Vx between ( VCc + C 3 sat)) and (- VBE(on)), both Q3 and Q2 are in the forward-active region, and V0 follows V with Q2 acting as an emitter follower. As Vi is taken negative, the current in...

## 082 082

This calculation assumes that dXd dVDS and Leff are constant for each type of transistor, allowing us to use constant Early voltages. In practice, however, dXd dVDS and Leff both depend on the operating point, and accurate values of the Early voltages are rarely available to circuit designers when channel lengths are less than about 1.5 xm. As a result, circuit simulations are an important part of the design process. SPICE simulation of the op amp under the conditions described above gives a...

## 09

Compare your answer with a SPICE simulation. Also, compare your answer to the result that would apply without mismatch. 4.19 Although Gm cni of a differential pair with a current-mirror load can be calculated exactly from a small-signal diagram where mismatch is allowed, the calculation is complicated because the mismatch terms interact, and the results are difficult to interpret. In practice, the mismatch terms are often a small fraction of the corresponding average values, and the...

## 1

The validity of (1.51) depends on W2Bl2TbDn 1 and (Dp Dn)(WB Lp)(NA ND) < sc 1, and this is always true if 3F is large see (1.48) . The term y in (1.51) is called the emitter injection efficiency and is equal to the ratio of the electron current (npn transistor) injected into the base from the emitter to the total hole and electron current crossing the base-emitter junction. Ideally y 1, and this is achieved by making ND NA large and WB small. In that case very little reverse injection occurs...

## 1 1

Equation 3.84 shows that the body effect reduces the output resistance, which is desirable because the source follower produces a voltage output. This beneficial effect stems from the nonzero small-signal current conducted by the gmb generator in Fig. 3.25b, which increases the output current for a given change in the output voltage. As ra oo and Rl oo, this output resistance approaches l (gm + gmb). The common-gate input resistance given in (3.54) approaches the same limiting value. As with...

## 1 1 1

Figure 9.45 Poles of the transfer function of the feedback amplifier of Fig. 9.41. The transfer function contains no zeros. near the jco axis, which would give rise to an excessively peaked response. In practice, oscillation can occur because higher magnitude poles do exist and these would tend to give a locus of the kind of Fig. 9.39, where the remote poles cause the locus to bend and enter the right half-plane. (Note that this behavior is consistent with the alternative approach of...

## 10

Allowed dimensions of passive devices have also decreased.) This trend is driven primarily by economics in that reducing dimensions increases the number of devices and circuits that can be processed at one time on a given wafer. A second benefit has been that the frequency capability of the active devices continues to increase, as intrinsic fj values increase with smaller dimensions while parasitic capacitances decrease. Vertical dimensions such as the base width of a bipolar transistor in...

## 100

V2 v0- Vbe20 (10 - 0.525) V 9.475 V Vi v2 - Vbe23 (9.475 - 0.613) V 8.862 V 5.4.4 All-npn Class B Output Stage7-6-9 The Class B circuits described above are adequate for many integrated-circuit applications where the output power to be delivered to the load is of the order of several hundred milliwatts or less. However, if output-power levels of several watts or more are required, these circuits are inadequate because the substrate pnp transistors used in the output stage have a limited...

## 1000

V0(t) 0.031 sin (27t x 102r) - 51 Operating the loop with no loop filter has several practical drawbacks. Since the phase detector is really a multiplier, it produces a sum frequency component at its output as well as the difference frequency component. This component at twice the carrier frequency will be fed directly to the output if there is no loop filter. Also, all the out-of-band interfering signals present at the input will appear, shifted in frequency, at the output. Thus, a loop filter...

## 102 Precision Rectification

Perhaps the most basic nonlinear operation performed on time-varying signals is rectification. An ideal half-wave rectifier is a circuit that passes signal currents or voltages of only one polarity while blocking signal voltages or currents of the other polarity. The transfer characteristic of an ideal half-wave rectifier is shown in Fig. 10.1. Also shown in Fig. 10.1 is the transfer characteristic of a second useful rectifier, the full-wave type. Practical rectifiers can be divided into two...

## 1034 A Complete Analog Multiplier3

In order to be useful in a wide variety of applications, the multiplier circuit must develop an output voltage that is referenced to ground and can take on both positive and negative values. The transistors Q3, Q4, Q5, Q6, Q7t and 8, shown in Fig. 10.13, are referred to as the multiplier core and produce a differential current output that then must be amplified, converted to a single-ended signal, and referenced to ground. An output amplifier is thus required, and the complete multiplier...

## 1035 The Gilbert Multiplier Cell as a Balanced Modulator and Phase Detector

The four-quadrant multiplier just described is an example of an application of the multiplier cell in which all the devices remain in the active region during normal operation. Used in this way the circuit is capable of performing precise multiplication of one continuously varying analog signal by another. In communications systems, however, the need frequently arises for the multiplication of a continuously varying signal by a square wave. This is easily accomplished with the multiplier...

## 104 Phase Locked Loops PLL

The phase-locked loop concept was first developed in the 1930s.4 It has since been used in communications systems of many types, particularly in satellite communications systems. Until recently, however, phase-locked systems have been too complex and costly for use in most consumer and industrial systems, where performance requirements are more modest and other approaches are more economical. The PLL is particularly amenable to monolithic construction, however, and integrated-circuit...

## 1041 Phase Locked Loop Concepts

A block diagram of the basic phase-locked loop system is shown in Fig. 10.18. The elements of the system are a phase comparator, a loop filter, an amplifier, and a voltage-controlled oscillator. The voltage-controlled oscillator, or VCO, is simply an oscillator whose frequency is proportional to an externally applied voltage. When the loop is locked on an incoming periodic signal, the VCO frequency is exactly equal to that of the incoming signal. The phase detector produces a dc or...

## 1042 The Phase Locked Loop in the Locked Condition

Under locked conditions, a linear relationship exists between the output voltage of the phase detector and the phase difference between the VCO and the incoming signal. This fact allows the loop to be analyzed using standard linear feedback concepts when in the locked condition. A block diagram representation of the system in this mode is shown in Fig. 10.20. The gain of the phase comparator is KD V rad of phase difference, the loopfilter transfer function is F(s), and any gain in the forward...

## 1115

Check headroom requirements in the bias circuit For the. branch induct ing M,3 0, this branch operate with all transistors in the active region if Voy C 0-33 V For the branch including M 0.1 v) - VT in 4- 0.7 v- (-ifc). 0 U,. in 4 36 mV (neglect) - -0.8 V 5 -0. -0 -0 -0.7-(-l'5) 3 y 1.3 3 V*, o. 43 V So, this branch operates with all -transistors in the active, region if H < 0.43 V 50 this lesion vvill u e the previous y cormputeef value .of

## 12 V

Figure 5.42 k -npn Darlington output stage. (c) Calculate the maximum average power that can be delivered to RL 8 ft before clipping occurs and the corresponding efficiency of the complete circuit. Also calculate the maximum instantaneous power dissipated in each output transistor. Assume that feedback is used around the circuit so that V0 is approximately sinusoidal. (d) Use SPICE to plot the dc transfer characteristic from Vj to V as V0 is varied over the complete output voltage range with RL...

## 120

In this example, acmc is much larger than acm because the transconductance in (12.35) is much larger than the degenerated transconductance in (12.37). The CMFB loop uses negative feedback to make Voc VCM. If VCM changes by a small amount from its design value due to parameter variations in the circuit that generates Vcm, Kr Should change by an equal amount so that Voc tracks VCM. The ratio A Voc A VCM is the closed-loop small-signal gain of the CMFB loop, which from Fig. 12.12 is 1, Acmfb 88 1...

## 1252114 2661114 3302e14 1999114 2302e14 3061e15

1.4921-22 2.378e-20 2.302e-20 6.126e-22 2.302s-20 1.492s-22 1.2521-14 2.661s-14 3.3021-14 1.9991-14 2.302e-14 3.0611-15 1.492e-22 2.378e-20 2.302e-20 6.126e-22 2.302e-20 1.492e-22 1.252e-14 2.661e-14 3.302e-14 1.999e-14 2.3021-14 3.0612-15 0 sjbop 1.000e-04 -1.277e-14 -2.967e-14 1.277e+00 1.690e+00 -1.277e+00 7.000e-01 5.774e-01 6.000e-04 0. 7.7b1e-23 2.402e-20 2.302e-20 9.206e-22 2.302e-20 7.781e-23 1.176e-22 4.800e-20 4.604e-20 1.841e-21 4.604e-20 1.176e-22 1.000e-04 -1.277e-14 -2.967e-14...

## 1280 V

To reduce the TCF, the constant M in (4.249)-(4.252) is often trimmed at one temperature so that the band-gap output is set to a desired target voltage.19 In principle, the target voltage is given by (4.253). In practice, however, significant inaccuracy in (4.253) stems from an approximation in (4.244).20 As a result, the target voltage is usually determined experimentally by measuring the TCp directly for several samples of each band-gap reference in a given process.2122 This procedure reduces...

## 130

Fi-om Curvd A > A0 38,000 mil* eu ne B, A0 - 20,000 um C ijooo mit2- curve a,& j and d axe predicied by t-he quation. 5 nversdy proporfi'onal -to fhe 5 3 , N X 5 tbtf. propor-tionAlihj constant related +0 the i afer siy mort Spea'f cAlly, K 5 effective, or uiablr txrea on tant vtafer). By (2-S6) , -the cost per un if silicon h -tota thermal r sistante 19 att

## 146

1.3.5 Dependence of Transistor Current Gain pF on Operating Conditions Although most first-order analyses of integrated circuits make the assumption that fiF is constant, this parameter does in fact depend on the operating conditions of the transistor. It was shown in Section 1.3.2, for example, that increasing the value of Vce increases Ic while producing little change in IB, and thus the effective of the transistor increases. In Section 1.3.4 it was shown that as VCe approaches the breakdown...

## 15 V

Figure 9.59 Input stages of an op amp. 9.25 Assuming that the zero has been moved to infinity, determine the maximum load capacitance that can be attached directly to the output of the circuit of Fig. 9.60 and still maintain a phase margin of 45 . Neglect all higher order poles except any due to the load capacitance. Use the value of W L obtained in Problem 9.23 for M9 with the bias circuit of Fig. 9.61. 9.26 Repeat Problem 9.25 except, for the op amp, use the aspect ratios, supply voltages,...

## 16

Die in integrated high-frequency communication circuits. There are no sources of noise in ideal capacitors or inductors. In practice, real components have parasitic resistance that does display noise as given by the thermal noise formulas of (11.4) and (11.5). In the case of integrated-circuit capacitors, the parasitic resistance usually consists of a small value in series with the capacitor. Parasitic resistance in inductors can be modeled by either series or shunt elements. The device...

## 17

Figure 5.35 Schematic of the top error amplifier and output transistor M Figure 5.35 Schematic of the top error amplifier and output transistor M Since Mi3 and Mu also form a current mirror, and since (W L) 4 (W L) 13, Substituting (5.131) and (5.132) into (5.133) gives , _ , (w l) 13 tail hie - 'bias + Since ID15 di6 when IDU )12, KSD14 VsDn (313 V gl Therefore, ignoring channel-length modulation, Substituting (5.130) into (5.136) and rearranging gives

## 20 40 6080100

Figure 2.29 Capacitance and depletion-layer width of an abrupt pn junction as a function of applied voltage and doping concentration on the lightly doped side of the junction11 where NB is the doping density in the epi material and VR is the reverse bias on the junction. The nomograph of Fig. 2.29 can also be used to determine the junction depletion-region width as a function of applied voltage, since this width is inversely proportional to the capacitance. The width in microns is given on the...

## 23 High Voltage Bipolar Integrated Circuit Fabrication

Integrated-circuit fabrication techniques have changed dramatically since the invention of the basic planar process. This change has been driven by developments in photolithography, processing techniques, and also the trend to reduce power-supply voltages in many systems. Developments in photolithography have reduced the minimum feature size attainable from tens of microns to the submicron level. The precise control allowed by ion implantation has resulted in this technique becoming the...

## 25

Circuit for Problem 12.23. V0i t Vod(t and Voc(t)l What are Vn(t Vi2 t Vid(t and Vlc(t)7 12.22 The op amp in Problem 12.4 is used with the CMFB scheme shown in Fig. 12.17. The circuit is perfectly balanced except that the CM-sense resistors are mismatched with the upper resistor Rcs 10.1 kil and the lower resistor Rcs2 9.9 kfL Assume the source followers and the CM-sense amplifier are ideal with gains of unity. (a) Compute the gains acms and adm-cms in (12.106). (b) Compute the...

## 2596211 5374e14 6601211 4146e14 1601211 6102e15

1.0002*07 1.1221*07 1.258E+07 1.4122*07 1.584E+07 1.7788*07 1. 958*07 2.2388*07 2.5118*07 2.8188*07 3.1628*07 3.5488*07 3.9818*07 4.4 6E 07 5.0118*07 5.6238*07 6.3098*07 7.079B*07 7.9438*07 8.9122+07 9.9998*07 1.1228*0 1.25B8*0I 1.4128*0 1.5848*0 1.7788*08 1.9958*08 2.2388*08 2.5118*08 2.8188*0 3.1628*0 3.5488*08 3.9811*08 4.4668*08 5.0111*08 5.6238*08 6.3098*08 7.0798*08 7.9438*08 8.9128*0 9.9998*0 1.1228*09 1.2588*09 1.4128*09 1.5848*09 1.7718*09 1.9958+09 2.2388*09 -7.928+01 -7.828*01...

## 31

Since Vds3 Vd32, Vm y,32 Vtn, and (W L)3l (W L)32. This equation shows that Icm is dependent on the CM output voltage and independent of the differential output voltage because changes in the drain currents in M31 and M32 due to nonzero V* are equal in magnitude and opposite in sign. Therefore, these changes cancel when the drain currents are summed in (12.62). Applying KVL around the lower transistors A 30-M35 gives Vds3l Vds35 + Vgs33 - (12.63) Assuming that I0 33, we have Vgs30 V .33, and...

## 35 30 25 20 15 10 5

Figure 2.63 (a) Plan view and cross section of polysilicon resistor. resistor described in Section 2.6.2 and shown in Fig. 2.42. It displays large tolerance, high voltage coefficient, and high temperature coefficient relative to other types of resistors. Higher sheet resistance can be achieved by the addition of the pinching diffusion just as in the bipolar technology case. MOS Devices as Resistors. The MOS transistor biased in the triode region can be used in many circuits to perform the...

## 3600

Where the pole magnitudes are in radians per second. Equation 9.21 gives a unity-gain frequency where a(ja> ) 1 of 780 kHz. This is slightly below the design value of 1 MHz because the actual gain curve is 3 dB below the asymptote at the break frequency p . At 780 kHz the phase shift obtained from (9.21) is -139 instead of the desired -135 and this includes a contribution of -11 from pole p2. Although this result is close enough for most purposes, a phase margin of precisely 45 can be...

## 567

56.7 1.4 k _ TT56J + 19-6m In (8.209), the second term that includes J can be neglected whenever d < sc A 8ft . This condition usually holds at low frequencies because d is the forward signal transfer through a passive network, while A 2ft, is large because it includes the gain through the active device(s). For example, ignoring the d (l + < 3i) term in (8.216) gives A -19.7ki , which is close to the exact value. As the frequency increases, however, the gain provided by the transistors...

## 6

As a < e 0, and the gain of the switched-capacitor amplifier approaches CXIC2 as predicted in (6.28). As a result, the circuit gain is said to be parasitic insensitive to an extent that depends on the op-amp gain. One important parameter of the switched-capacitor amplifier shown in Fig. 6.9a is the minimum clock period. This period is divided into two main parts, one for each clock phase. The duration of 02 must be long enough for the op-amp output to reach and stay within a given level of...

## 625Common Mode Rejection Ratio CMRR

If an op amp has a differential input and a single-ended output, its small-signal output voltage can be described in terms of its differential and common-mode input voltages vid and vu) by the following equation where Adm is the differential-mode gain and Acm is the common-mode gain. As defined in (3.187), the common-mode rejection ratio of the op amp is From an applications standpoint, the CMRR can be regardedas_the_ hange in input offset voltage that results from a unit change in common-mode...

## 633Input Offset Voltage

In Sections 3.5.6 and 6.2.3, the input offset voltage of a differential amplifier was defined as the differential input voltage for which the differential output voltage is zero. Because the op amp in Fig. 6.16 has a single-ended output, this definition must be modified here. Referring to the voltage between the output node and ground as the output voltage, the most straightforward modification is to define the input offset voltage of the op amp as the differential input voltage for which the...

## 638Layout Considerations

A basic objective in op-amp design is to minimize the mismatch between the two signal paths in the input differential pair so that common-mode input signals are rejected to the greatest possible extent. Mismatch affects the performance of the differential pair not only at dc, where it causes nonzero offset voltage, but also at high frequencies where it reduces the common-mode and power-supply rejection ratios. Figure 6.22a shows a possible layout of a differential pair. Five nodes are labeled...

## 67 MOS Active Cascode Operational Amplifiers

One way to increase the gain of the folded-cascode op amp without cascading additional stages is to add another layer of cascodes. See Problem 6.21. Although this approach gives a gain on the order of (gmr0)3, it reduces the output swing by at least another overdrive in each direction. This reduction becomes increasingly important as the difference between the power-supply voltages is reduced in scaled technologies. To increase the op-amp gain without reducing the output swing, the...

## 692 Design of Low InputCurrent Operational Amplifiers

In instrumentation applications in which the signal source has a low internal impedance, the input offset voltage and its associated drift usually place a lower limit on the dc voltage than can be resolved. When the source impedance is high, however, the input bias current and input offset current of the op amp flowing in the source resistance or the gain-setting resistors can be important in limiting the ability of the circuit to resolve small dc signals. Furthermore, many applications involve...

## 7

Thus the transfer characteristic of the feedback amplifier of Fig. 8.3 shows much less nonlinearity than the original basic-amplifier characteristics of Fig. 8.2. Note that the horizontal scale in Fig. 8.3 has been compressed as compared to Fig. 8.2 in order to allow easy comparison of the two graphs. This scale change is necessary because Figure 8.3 Feedback-amplifier transfer characteristic corresponding to the basic-amplifier characteristic of Fig. 8.2. the negative feedback reduces the...

## 7143e01 7291e05 8810e06 9318e06 1470e06 3794e06 3921106 4792e06 1316e05

1.000E+00 1.021E-04 1.233E-05 1.304E-05 2.058E-06 5.312E-06 5.489E-06 6.708E-06 1.842E-05 1.764E+02 8.825E+01 9.282E+01 8.5612+01 1.0241+02 7.440E+01 4.849E+00 9.9021+01 1.7471+02 -8.8141+01 -8.357E+01 -2.620E+02 -2.788E+02 -1.0201+02 -1.7151+02 -7.7381+01 -3.5111+02 TOTAL HARMOanC DISTORTIOH 1.058E-02 FERCEHT FOURIER COMPOHEHTS OF TRAHSIZHT RESPONSE V(9,10) DC COKPOHEHT - 1.793D+00 HARMCNIC FREQUEHCT FOURIER NORMALIZED PHASE NORMALIZED HO (HZ) COSIPOBttHT COKFCNEHT (DEG) PHASE (DEG)

## 783

Common centroid geometry, 440-442, 476,477 configuration, 202 Common-collector-common-emitter configuration, 202 Common-collector configuration, 191, 503 Common-drain configuration, 195, 509, 591 Common-emitter-common-base configuration, see Cascode configuration Common-emitter configuration, 175, 490, 494 Common-emitter frequency response, 490, 494 Common-emitter output stage, 576 Common-gate configuration, 186, 188, 190.515, 525 Common-gate frequency response, 515 Common-mode feedback, 228,...

## 81 Ideal Feedback Equation

Consider the idealized feedback configuration of Fig. 8.1. In this figure 5, and SQ are input and output signals that may be voltages or currents. The feedback network (which is usually linear and passive) has a transfer function and feeds back a signal Sfb to the input. At the input, signal Sfb is subtracted from input signal at the input differencing node. Error signal Se is the difference between St and Sfb, and S is fed to the basic amplifier with transfer function a. Note that another...

## 851 Shunt Shunt Feedback

Consider the shunt-shunt feedback amplifier of Fig. 8.9. The effect of nonideal networks may be included as shown in Fig. 8.13a, where finite input and output admittances are assumed in both forward and feedback paths, as well as reverse transmission in each. Finite source and load admittances ys and yL are assumed. The most convenient two-port Figure 8.13 (a) Shunt-shunt feedback configuration using the y-parameter representation, (b) Circuit of (a) redrawn with generators _y2i v,- and y 2av0...

## 854 Shunt Series Feedback

Shunt-series feedback is shown schematically in Fig. 8.11. In this case the basic amplifier and the feedback network have common input voltages and output currents, and hybrid g parameters as defined in Fig. 8.29 are best suited for use in this case. The feedback circuit is shown in Fig. 8.30a, and, at the input, we find that (ys + glla + gllf)Vi + (gl 2 + g 12 f)io node, and the feedback function can be identified as The gain a of the basic amplifier is determined by calculating the current...

## 89 Modeling Input and Output Ports in Feedback Circuits

Throughout this chapter, the source and load impedances have been included when analyzing a feedback circuit. For instance, the inverting voltage-gain circuit in Fig. 8.47a, with source resistance Rs and load resistance RL, can be analyzed using the two-port or return-ratio methods described in this chapter. The resulting model is shown in Fig. 8.47 . The source and load resistances do not appear explicitly in the model, but the gain A, input resistance Rh and output resistance R are functions...

## 91

The return ratio can be used to check stability of an amplifier with a single feedback loop because A f_ and d are stable transfer functions associated with passive networks, and Ms) is stable because it is the signal transfer around a loop that consists of one gain stage or a cascade of stable gain stages. Therefore the zeros of 1 + 2ft(s), which are poles of the closed-loop gain A, determine the stability of the feedback circuit.24 From the Nyquist stability criterion, these zeros are in the...

## 92Relation Between Gain and Bandwidth in Feedback Amplifiers

Chapter 8 showed that the performance improvements produced by negative feedback were obtained at the expense of a reduction in gain by a factor (1 + T), where T is the loop gain. The performance specifications that were improved were also changed by the factor (1 + T). In addition to the foregoing effects, negative feedback also tends to broadband the amplifier. Consider first a feedback circuit as shown in Fig. 9.1 with a simple basic amplifier whose gain function contains a single pole...

## 941 Theory of Compensation

Consider again the amplifier whose gain and phase is shown in Fig. 9.8. For the feedback circuit in which this was assumed to be connected, the forward gain was A0, as shown in Fig. 9.8, and the phase margin was positive. Thus the circuit was stable. It is apparent, however, that if the amount of feedback is increased by making larger (and thus A0 smaller), oscillation will eventually occur. This is shown in Fig. 9.11, where fi is chosen to give a zero phase margin and the corresponding overall...

## 943 Two Stage MOS Amplifier Compensation

The basic two-stage CMOS op amp topology shown in Fig. 6.16 is essentially identical to its bipolar counterpart. As a consequence, the equivalent circuit of Fig. 9.21 can be used to represent the second stage with its compensation capacitance. The poles of the circuit are again given by (9.32) and (9.33) and the zero by (9.27a). In the case of the MOS transistor, however, the value of gm is typically an order of magnitude lower than for a bipolar transistor, and the break frequency caused by...

## 944 Compensation of Single Stage CMOS Op Amps

Single-stage op amps, such as the telescopic cascode or folded cascode, have only one gain stage therefore Miller compensation is not possible. These op amps have high open-loop output resistance and are typically used in switched-capacitor circuits, where the load is purely capacitive. Therefore, the dominant pole is associated with the output node, and the load capacitor provides the compensation. A simplified, fully differential, telescopic-cascode op amp is shown in Fig. 9.30 . The...

## 945 Nested Miller Compensation

Many feedback circuits require an op amp with a high voltage gain. While cascoding is commonly used to increase the gain in op amps with a total supply voltage of 5 V or more, cascoding becomes increasingly difficult as the power-supply voltage is reduced. (See Chapter 4.) To overcome this problem, simple gain stages without cascoding can be cascaded to achieve high gain. When three or more voltage-gain stages must be cascaded to achieve the desired gain, the op amp will have three or more...

## 951 Root Locus for a Three Pole Transfer Function

Consider an amplifier whose transfer function has three identical poles. The transfer function can be written as where aQ is the low-frequency gain and p is the pole magnitude. Consider this amplifier placed in a negative-feedback loop as in Fig. 9.1, where the feedback network has a transfer function , which is a constant. If we assume that the effects of feedback loading are small, the overall gain with feedback is hi gmoRog,nlRigm2R2 20,000 86 dB Figure 9.35 Root locus for a feedback...

## 953 Root Locus for Dominant Pole Compensation

Consider an op amp that has been compensated by creation of a dominant pole at Pl. If we assume the second most dominant pole is at p2 and neglect the effect of higher order poles, the root locus when resistive feedback is applied is as shown in Fig. 9.40. Using rules 1 and 2 indicates that the root locus exists on the axis between Pl and p2, and the breakaway point is readily shown to be using rule 6. Using rules 7 and 8 shows that the asymptotes are at 90 to the real axis and meet the axis at...

## 954 Root Locus for Feedback Zero Compensation

The techniques of compensation described earlier in this chapter involved modification of the basic amplifier only. This is the universal method used with op amps that must be compensated for use with a wide variety of feedback networks chosen by the user. However, this method is quite wasteful of bandwidth, as was apparent in the calculations. In this section, a different method of compensation will be described that involves modification of the feedback path and is generally limited to...

## 96 Slew Rate

The previous sections of this chapter have been concerned with the small-signal behavior of feedback amplifiers at high frequencies. However, the behavior of feedback circuits with large input signals (either step inputs or sinusoidal signals) is also of interest, and the effect of frequency compensation on the large-signal, high-frequency performance of feedback amplifiers is now considered. t Figure 9.48 Circuit for testing slew-rate performance. and f0 is the -3-dB frequency. Since the...

## 962 Methods of Improving Slew Rate in Two Stage Op Amps

In order to examine methods of slew-rate improvement, a more general analysis is required. This can be performed using the circuit of Fig. 9.52, which is a general representation of an op amp circuit. The input stage has a small-signal transconductance gmI and, with a large input voltage, can deliver a maximum current Ixm to the next stage. The compensation is shown as the Miller effect using the capacitor C, since this representation describes most two-stage integrated-circuit op amps. From...

## 965 Effect of Slew Rate Limitations on Large Signal Sinusoidal Performance

The slew-rate limitations described above can also affect the performance of the circuit when handling large sinusoidal signals at higher frequencies. Consider the circuit of Fig. 9.48 with a large sinusoidal signal applied as shown in Fig. 9.57a. Since the circuit is connected as a voltage follower, the output voltage V0 will be forced to follow the V, waveform. The maximum value of dVJdt occurs as the waveform crosses the axis, and if V, is given by As long as the value of dVi dt max given by...

## Vod I Voc VcMWod

4 4 V23 - (Vod 2)2 ) 8 4V2v23 - (Vod 2)2 If Vod 21 < 2Vov23 , this equation reduces to (12.56). To interpret (12.61), first consider the case when Voc VCM. Then (12.61) shows that the CM-sense output current is constant with Icms 20. Whereas Icms is constant, (12.59) and (12.60) show that Id22 and Im are not constant if Vod is nonzero and time-varying, and Id22 and Id23 are nonlinear functions of Vod (see the plot in Fig. 3.51). However, the variation in Id22 due to nonzero V0d is equal and...

## A412

Matched current sources are often required in MOS analog integrated circuits. The factors affecting this mismatch can be calculated using the circuit of Fig. 4.52. The two transistors Mi and M2 will have mismatches in their W L ratios and threshold voltages. The drain Figure 4.53 Current mirror with two outputs used to compare voltage- and current-routing techniques. circuit with desirable properties. For example, a self-biased band-gap reference might be used to make fa insensitive to changes...

## A42 Input Offset Voltage Of Differential Pair With Active Load A421 Bipolar

For the resistively loaded emitter-coupled pair, we showed in Chapter 3 that the input offset voltage arises primarily from mismatches in Is in the input transistors and from mismatches in the collector load resistors. In the active-load case, the input offset voltage results from nonzero base current of the load devices and mismatches in the input transistors and load devices. Refer to Fig. 4.25a. Assume the inputs are grounded. If the matching is perfect and if pF > in T3 and T4, Equation...

## A92 Roots Of A Quadratic Equation

A second-order polynomial often appears in the denominator or numerator of a transfer function, and the zeros of this polynomial are the poles or zeros of the transfer function. In this appendix, the relationships between the zeros of a quadratic and its coefficients are explored for a few specific cases of interest. Also, the conditions under which a dominant root exists are derived. Consider the roots of the quadratic equation A9.2 ROOTS OF A QUADRATIC EQUATION 693 The two roots of this...

## Ac Analisis

S.3092+07 1.356E+07 B.577E+07 1.000E+08 1.1658*08 1.359E+08 1.5848*08 1.8478*08 2.1548*08 .5111*08 2 .9288*08 3.4148*08 3.9811*09 4. I 11*08 5.1111*08 6.3098*08 7.3568*08 8.5771*08 1.0008*09 1.1 5E.05 1.3598+09 1.5B48 09 1.847E+05 2.1548+09 2.5118*09 2.9282*09 3.4112*09 3.9811*59 4.6412*09 5.4112*09 i.3092*09 r.3561*09 3.002*01 -3.002*01 -3.002*01 -3.001*01 -3.002*01 -3.002*01 -3.012*01 -3.012*01 -3 .OlEtOl -3.018*01 -3.028*01 -3.02E*01 -3 -03E*01 -3.042*01 -3.058*01 -3.078*01--3.082*01...

## Ac Dec 10 100k 20meg

.omCBS VBTOklN ABSTOL-1F RELTOL lU -WIDTH OOT SO .OPTIONS SPICE * SMALL-SIGNAL TRANSFER CHARACTERISTICS 1.0008-08 2.000E-03 3.000E-08 (.0005-08 5.000E-08 6.0008-08 7.0008-08 B.OOOE-08 9.000E-08 1.0008-07 1.1008-07 1.200E-07 1.300E-07 1.4008-07 1 5008-07 1.4008-07 1.7008-07 1.800E-07 2 .100E-Q7 2.200E-C7 2.3008-07 2 .(OOE-97 500E-07 2.600E-07 2.7008-07 2 8008-07 2 9008-07 3.000E-07 3.100E- 7 3.20CE-07 3.3001-07 1008-07 3.5008-07 3 -600E-07 3 7008-07 3.8001-07 3.9002-07 1.0008-07 (.1008-07...

## B

Figure 11.34 (a) Common-base transistor configuration, (b) Common-base equivalent circuit with noise generators, (c) Common-base equivalent circuit with input noise generators. 11.7.2 Emitter-Follower Noise Performance Consider the emitter follower shown in Fig. 11.35. The noise performance of this circuit can be calculated using the results of previous sections. The circuit can be viewed as a series-feedback stage and the equivalent input noise generators of the transistor can be moved...

## C

Where eox and tox are the permittivity and the thickness of the oxide, respectively. A typical value of y is 0.5 V1 2, and Cox 3.45 fF xm2 for tox 100 angstroms. In practice, the value of VtQ is usually adjusted in processing by implanting additional impurities into the channel region. Extra -type impurities are implanted iq the channel to set V,q between 0.5 V and 1.5 V for -channel enhancement devices. By implanting -type impurities in the channel region, a conducting channel can be formed...

## Mfb

Figure 4.38 (a) Self-biasing Vbe reference, (b) Self-biasing V, reference. the start-up circuit must not interfere with the normal operation of the reference once the desired operating point is reached. The Vg -referenced current source with a typical start-up circuit used in bipolar technologies is illustrated in Fig. 4.39a. We first assume that the circuit is in the undesired zero-current state. If this were true, the base-emitter voltage of Ti would be zero. The base-emitter voltage T2 would...

## C1C2 CmlCl C2 Cm

To ensure that the high-frequency poles are in the left half-plane (LHP), aila must be positive (see Appendix A9.2). Therefore, gm2 must be larger than gm . Poles p2 and p can be real or complex, and in general the quadratic formula must be used to solve for these poles. However, if these poles are real and widely spaced and if Cm 1 C , C2, then approximate expressions can be found. If p2 then - l p2 is approximately equal to the coefficient of s in D'(s), so (Sm2 gm )Cm Also l (p2pi) is equal...

## Co

Ignoring (11.16) and substituting (11.14) and (11.15) in (11.17) gives In (11.72) the ac current gain of the MOS transistor can be identified as and thus the noise generators at the output are divided by A when referred back to the input. At low frequencies the input noise-current generator is determined by the gate leakage current IG, which is very small (10-15 A or less). For this reason, MOS transistors have noise performance that is much superior to bipolar transistors when the driving...

## Ds2

Figure 4.5 Output characteristic of simple MOS current mirror. through the labeled point. As described in Chapter 1, extrapolation of the output characteristic in the active region back to the VDS2 axis gives an intercept at -VA -1 A, where VA is the Early voltage. If VA VDSi, the slope of the straight line is about equal to (W LMW LhUIoi VAl Therefore, Since the ideal gain of the current mirror is (W L)2 (W L)i, the systematic gain error, e, of the current mirror can be calculated from (4.19)....

## Example

Find the output resistance for the MOS super-source follower shown in Fig. 8.45a. Ignore body effect here to simplify the analysis. The super-source follower uses feedback to reduce the output impedance. Ideal current sources l and I2 bias the transistors and are shown rather than transistor current sources to simplify the circuit. With current source I forcing the current in Mx to be constant, M2 provides the output current when driving a load. There is feedback from vout to vgs2 through Mi....

## F bl J1

_3dB 2tt 277 (1000 il)(5.1 pF + 35.7 pF) 19MHz For comparison, using (7.34) gives i 23.1 Mrad s and _3dB 3.7 MHz, which is close to the result using the Miller effect. The low-frequency gain can be calculated from (7.33) as -gmRL -(14.1 (5000 n) -70.5 7.2.2 Frequency Response of the Common-Mode Gain for a Differential Amplifier In Chapter 3, the importance of the common-mode (CM) gain of a differential amplifier was described. It was shown that low values of CM gain are desirable so that the...

## Fully Differential Operational Amplifiers

The analysis of integrated-circuit operational amplifiers (op amps) in Chapter 6 focused on op amps with single-ended outputs. The topic of this chapter is fully differential op amps, which have a differential input and produce a differential output. Fully differential op amps are widely used in modern integrated circuits because they have some advantages over their single-ended counterparts. They provide a larger output voltage swing and are less susceptible to common-mode noise. Also,...

## General References

Modelling the Bipolar Transistor. Tektronix Inc., 1976. P. E. Gray and C. L. Searle, Electronic Principles. Wiley, New York, 1969. R. S. Muller and T. I Kamins. Device Electronics for Integrated Circuits. Wiley, New York, 1986. Y. P. Tsividis. Operation and Modeling of the MOS Transistor. McGraw-Hill, New York, 1987. 2.2 Basic Processes in Integrated-Circuit Fabrication The fabrication of integrated circuits and most modern discrete component transistors is based on a sequence of...

## H

Figure 2.73 Electrical analog for the thermal behavior of the die-package structure. device through the silicon material, which gives rise to temperature gradients across the top surface of the chip. These gradients can strongly affect circuit performance, and their effects are studied further in Chapter 6. Second, the heat must then flow out of the silicon material into the package structure, and then out of the package and to the ambient atmosphere. The flow of heat from the package to the...

## H hi KiVi1027

Here Iol is the dc current that flows in each output lead if V, is equal to zero, and K is the transconductance of the voltage-to-current converter. The differential voltage developed Thus if this functional block is used as the compensating nonlinearity in series with each input as shown in Fig. 10.11, the overall transfer characteristic becomes, using (10.23),

## I

Figure 2.40 Lumped model for the base-diffused resistor. the base diffusion. The resistance contributed by the clubheads at each end of the resistor can be significant, particularly for small values of L W. The clubheads are required to allow space for ohmic contact to be made at the ends of the resistor. Since minimization of die area is an important objective, the width of the resistor is kept as small as possible, the minimum practical width being limited to about 1 jxm by photolithographic...

## Hwn

A fully differential op amp with capacitive load and feedback. Figure 12.26. A fully differential two-stage CMOS op amp using the CMFB scheme from Fig. 12.19. Figure 12.26. A fully differential two-stage CMOS op amp using the CMFB scheme from Fig. 12.19. First, we will design the devices to satisfy the bias and low-frequency requirements. Then we will compensate the amplifier. Using the device sizes and bias currents from the example in Section 6.3.5, we have (W Lh (W L)2 77 (W...

## Info

Figure 11.9 (a) Typical burst noise waveform, (b) Burst noise spectral density versus frequency. Figure 11.9 (a) Typical burst noise waveform, (b) Burst noise spectral density versus frequency. The spectral density of burst noise can be shown to be of the form K2 constant for a particular device I direct current c constant in the range 0.5 to 2 fc particular frequency for a given noise process This spectrum is plotted in Fig. 11. and illustrates the typical hump that is characteristic of burst...

## J K

Figure 10.31 Circuit for Problem 10.1. 10.2 Determine and sketch the dc transfer characteristic of the circuit shown in Fig. 10.32. Assume that VBt(on) 0.6 V. Check your result using SPICE, assuming Is 1016 A for the transistor. Approximate the op amp by a voltage-controlled voltage source with a gain of 10,000. 10.3 Determine and sketch the dc transfer characteristic of the circuit of Fig. 10.33. 10.4 Sketch the dc transfer curve out versus Vj for the Gilbert multiplier of Fig. 10.9 for V...

## K

Figure 10.3 Active precision half-wave rectifier, (a) Rectifier circuit. Figure 10.3 (b) dc transfer characteristic. The output voltage for Vjn < 0 is in the microvolt range if the op amp has no offset, (c) Input and output waveforms for the precision half-wave rectifier, V0 is output voltage of the op amp. During the positive excursions of the input, V takes on the value of V , which is the output voltage at which the op amp output stage saturates. Figure 10.3 (b) dc transfer characteristic....

## RiC2 Cm i Cm 2 iCi Cm 1 iiCmigm2i2

Equation 9.56 is the transfer function from is to vQ. The transfer function of the voltage gain from v, to v0 is found by multiplying (9.56) by gm0 (since is gmov, ) therefore, the voltage gain and (9.56) have the same poles and zeros. The transfer function in (9.56) has two zeros and three poles. Let us first examine the poles. The expressions for the a, coefficients are complicated and involve many terms. Therefore assumptions are needed to simplify the equations. If gm R1 gm2Ri 1, which is...

## K1vlK2v2 hi

Where Io2 and K2 are the parameters of the functional block following V2. Equation 10.32 shows that the differential output current is directly proportional to the product Vi V2, and, in principle, this relationship holds for all values of Vi and V2 for which the two output currents of the differential voltage-to-current converters are positive. For this to be true, , and 2 must always be positive, and from (10.27) and (10.28), we have Note that the inclusion of a compensating nonlinearity on...

## LB K[If wkF

And the burst noise term has been omitted for simplicity. The last term in parentheses in (11.57) is due to collector current noise referred to the input. At low frequencies this becomes Ic Ji and is negligible compared with IB for typical 30 values. When this is true, if and vf do not contain common noise sources and are totally independent. At high frequencies, howevcr thc last term in (11.57) increases and can become dominant, and correlation between vf and if may then be important since...

## M

For long channel lengths, the drain-depletion region has little effect on the channel, and the j-versus- m curves closely follow the ideal curves of Fig. 1.29. For increasing VDS, however, eventually the drain-substrate unction breakdown voltage is exceeded, and the drain current increases abruptly by avalanche breakdown as described in Section 1.2.2. This phenomenon is not inherently destructive. Punchthrough. If the depletion region around the drain in an MOS transistor...

## M D4 f ID5

An advantage of this approach is that it avoids the pole associated with the M5-M23 current mirror in Figs. 12.2 and 12.16. However, M2lA and M2lB add resistive and capacitive loading at the op-amp outputs. If an op amp uses cascoded devices, M2lA and M2lB can connect to low-impedance cascode nodes to reduce the impact of this loading opampfn Rg.12C2MFB aPPr aCh ** differential S drCUit Can be used with Choosing 20 M + ID4 and (W L)25 (W Lh is one design option. Again, as for * SenSe amPllfier...

## Modelsfor Integrated Circuit Active Devices

The analysis and design of integrated circuits depend heavily on the utilization of suitable models for integrated-circuit components. This is true in hand analysis, where fairly simple models are generally used, and in computer analysis, where more complex models are encountered. Since any analysis is only as accurate as the model used, it is essential that the circuit designer have a thorough understanding of the origin of the models commonly utilized and the degree of approximation involved...

## Noise in Integrated Circuits

This chapter deals with the effects of electrical noise in integrated circuits. The noise phenomena considered here are caused by the small current and voltage fluctuations that are generated within the devices themselves, and we specifically exclude extraneous pickup of man-made signals that can also be a problem in high-gain circuits. The existence of noise is basically due to the fact that electrical charge is not continuous but is carried in discrete amounts equal to the electron charge,...

## Nx

Figure 2.66 Cross section of a high-performance BiCMOS process. which forms the collectors of the npn bipolar devices and the channel regions of the PMOS devices. During this and subsequent heat cycles, the more mobile boron atoms out-diffuse and the p-well extends to the surface, whereas the antimony buried layers remain essentially fixed. A masking step defines regions where thick field oxide is to be grown and these regions are etched down into the epi layer. Field-oxide growth is then...

## Op1ratibo Poibt Information

Include noise due to s tA i.z Mak Jt j ir. to noi*Je of clrcu.it. A-t tke of Q this products a vtf-Ufe- Tnc lu.de notse < W -to Rs in. iz At tW . of 1 Tot -l Cnput noise ooCtk I KHz i x o19 x i y to15 Zxlo' A1 vTf- xT- ZV- Ks is the S(WY as previous, < wk Also If U* s lac at R* to ye the. seme. noise, tes onl .contribution vt -tUe- teof A is Vf -3 x cT 2-X fo5 3.Z* b V *-

## Opticus Spice

* > operating point information tocm- 27.000 temp- 27.000 +0 1 - 5.000e+00 0 2 - 2.500e+00 0 3 - 9.810e-01 1.581E 06 1.8472.06 .15IE 06 2 - S11E+06 .9 SE*o6 3.414E+C6 3.5815.06 l.iilE-05 5.1115.06 6.3095*76 .3565**6 S.577E-06 l.iOiS.OT 1.165E* 7 1.339E.C .5S15*0T .51 5.37 .9 SE-C-3.1115*37 3.9i 5-37 I.6115-37 5.11 5.3 6.3095*37 7.3565.3 t.5 E*37 . 0 5.3s 1.165E-C3 .35 . s i. 815.33 l.Sl S*3 .1515-35 .5115.S -lis-c- .1 15.3s 3.9S1E.3S 1.61 - 5.uiE- a 5.3395.CS .3jss- s S.575*09 1-C005.39 ....

## Problems

2.1 What impurity concentration corresponds to a 1 il-cm resistivity in p-type silicon In rc-type silicon 2.2 What is the sheet resistance of a layer of 1 il-cm material that is 5 fxm thick 2.3 Consider a hypothetical layer of silicon that has an n-type impurity concentration of 1017 cm-3 at the top surface, and in which the impurity concentration decreases exponentially with distance into the silicon. Assume that the concentration has decreased to He of its surface value at a depth of 0.5 fxm,...

## R l[jvts liA janv 30

Because the depletion region for unimplanted devices is much wider than for implanted devices, the channel length of unimplanted devices must be made longer than for implanted devices to achieve comparable punch-through voltages and small-signal output resistances under identical bias conditions. Effective Channel Width. The effective channel width of an MOS transistor is determined by the gate dimension parallel to the surface and perpendicular to the channel length over which the gate oxide...

## R

The zero-value time constant associated with C i is thus Because the input impedance of the common-base stage is small, the contribution of CM, to the sum of the zero value time constants is much smaller than that due to C -i. The time constant associated with Cw3 of Q3 can be calculated by recognizing that (7.122) derived for the emitter follower also applies here. The effective source resistance Rs is zero as the base is grounded, and the effective emitter resistance RL is infinite because...

## R0R lRs

The term in parentheses in (3.65) is about equal to the input source resistance multiplied by the Gmr0 product. Therefore, (3.65) and (3.53) together show that the common-base amplifier can be thought of as a resistance scaler, where the resistance is scaled up from the emitter to the collector and down from the collector to the emitter by a factor approximately equal to the Gmr0 product in each case. Common-Gate Output Resistance. For the common-gate amplifier, Gm (gm + gmb) from (3.42) and...

## Ri R2 6206

Note that c2 is almost independent of supply voltage because it is dependent only on the Zener diode voltage. The voltage across Ri and Q2 establishes the currents in current sources Q3, Q7, and Qh. Current source Q3 establishes the operating current in the voltage reference circuit composed of transistors Q4, Q5, Q6, resistors R6, R7, RH, and Zener diode D2. This circuit can be recognized as a variation of the Wilson current source described in Chapter 4, and Figure 8.37 Circuit diagram of the...

## Ri2 L L t

From Section 3.3.5.1 ignoring body effect in the MOS transistor and assuming rb ((30 + 1) Vgmi and j30 1 for the bipolar transistor . Since this resistance is significantly bigger than 1 gm2 when RL ro2, the magnitude of the gain from v(- to v.v can be significantly larger than one. However, this gain is still much smaller in magnitude than the gain from vf to v0 therefore, the Miller effect on T is smaller with the cascode transistor T2 than without it. To further reduce the Miller effect when...

## RL il I

Thus the output resistance is increased by a factor (1 + gmRE)- This fact makes the use of emitter degeneration desirable in transistor current sources. If the collector load resistor Rc is not large enough to neglect, it must be included in parallel with the expressions in (3.97)-(3.99). A small-signal equivalent circuit, neglecting Rc, is shown in Fig. 3.26d. On the other hand, if gmRE Po, (3.98) shows that The output resistance is finite even when Re 00 because nonzero test current flows in...

## Sc Transfer Cdhves

-1.000E-01 -6.021+00 -9.0001+00 - 6.02J+00 - .0001.00 -6.011+00 -7.0001*00 - 6.021+00 -6.0001-00 -6.021+00 -5.0001*00 -5.621*00 -4.0001*00 -4.661*00 -2.0001*00 -2.681*00 -1.0001*00 -1.691*00 -6.991-01 2.961-01 1.291*00 2.291*00 3.281+00-4.281*00 5.271*00 6.271*00 7.271*00 9.0001*00 1.261*00 1.0001*01 9.261*00