0000 1111

When troubleshooting any kind of equipment, intermittent problems are among the most difficult to trace. The first step when troubleshooting any problem is to collect as much information as possible. The following table outlines some basic questions which should be answered before attempting to troubleshoot an analog problem on the CP-3. (Additional troubleshooting techniques can be found in the Diagnostics section earlier in this chapter.) 2. at only certain signal frequencies 3. at only...

0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110

A 500ns low pulse should be present on the CONTRAST line each time the binary value to U37 changes. While pressing and holding the VOLUME or VOLUME keys, this amounts to 16 pulses before the maximum value is reached. The presence of this pulse can be checked with Pulse Detector (LEX 770-90025) or with a scope set for NORM (manual) trigger level set at 2.5VDC. The IR Remote test is a utility program that allows the CP-3 to identify and display the key being pressed on the infrared remote. The...

0111

The MDACs are typically tested by keeping one MDAC element fixed, sending the values shown above to the other element, then checking the resulting gain. The test is started by setting both of the MDACs to unity gain (both elements at ff), and taking a reference of the output level. The MDAC under test is then sent each value shown above, and the resulting gain is checked against the limit. Always return the value to ff before you step to the next MDAC. Troubleshooting the MDACs is fairly...

1

DATA X DATA BIT 0 X DATA BIT 1 X DATA BIT 2 Xj j 6 X DATA BIT 7 X Input Switching input composite video signals can be accepted from three different devices via three switchable input jacks. These inputs are numbered 1-3 and are configured in such a way that they change with the audio inputs. There are four audio inputs versus three video inputs. Audio inputs 1 -3 relate to the corresponding video inputs. If audio input 4 is selected, video input 1 is selected by default. If the CP-3 is turned...

10k 20k

Three SSM2402 analog switches (U220,223,232) are used to choose the signals that will be routed to the left and right outputs. The choices are the direct input signals (LINHP, RINHP), the left and right primary processed outputs (LFrt, RFrt), and the re-equalized primary processed outputs. Two dual op amps (Left U219 Right U231) are configured as summing amps for the three signals from the switches, thereby allowing any combination of the signals to be chosen. The switches are closed by a +5...

1k

Master Z80 Access In order to access Slave RAM and the Lexichip (U30) WCS, the Master Z80 to Slave Z80 Circuitry loads program code from the ROM to the Slave RAM and the Lexichip. The Master Z80 can access Slave circuitry only when 2. Slave Z80 is in the last two clock periods of an instruction fetch operation. (Refresh period) The Master Z80 accesses the Slave Z80 via the Dual Bus Interlace and the Master Buffer (U26-U29, U36) and two PLDs (U13 and U16, GAL16V8,1 B7 and 3 B5). The Slave Z80...

2

The master power switch should be left ON when the unit is in regular use. When the CP-3 will not be used for an extended period of time, or whenever you are connecting or disconnecting any cables to the unit, this switch should be turned OFF. Connect the supplied AC power cord here, then plug the cord into an unswitched outlet. Be sure that the power cord is firmly seated in this connector. The three video inputs are switched with their corresponding audio inputs and fed to VIDEO OUT. VIDEO...

3

- NUT,A-AO,KELP,ZN P N MS-01732 PLACES) RAME. L , SUB , FROMT, CP- 3 P M 702-OB 104 - NUT,A-AO,KELP,ZN P N MS-01732 PLACES) RAME. L , SUB , FROMT, CP- 3 P M 702-OB 104 5CRW,TAP,C> -32.XS l& ,TH ,PD,B2. P M > -< ) l-oe7 < , (2 PLACES) DI5P, LCD,1feX2,WEG,l2 00,LED,YL P N 430-08571 (SEE NOTE 4) - W5HR,FL 4 CL X .218 OD X .032.THK P N .44-0 73G (S PLACES) 5CRW,TAP,C> -32.XS l& ,TH ,PD,B2. P M > -< ) l-oe7 < , (2 PLACES) DI5P, LCD,1feX2,WEG,l2 00,LED,YL P N 430-08571 (SEE NOTE...

311

Dolby Filter Test This test verifies the functionality of the Rear Left and Right Dolby Filter circuits by checking gain, THD+N, and S N Ratio. Frequency response is not checked as part of this performance verification due to the complexity of the 1. Attach the audio input cable between the Low Distortion Oscillator and the CP-3 Right channel Input 1 jack. 2. Attach the audio output cable between the CP-3 Right Rear Output jack and the input of the Distortion Analyzer. 3. Verify that Input 1 is...

475525

Connect the + lead of the DVM to U24 pin 17. 2. Reduce the AC line voltage on the Variac to-15 of the rated line voltage. (See table below.) Verify the voltage reading is > 4V (see table). 3. Reduce AC line voltage to -33 of the nominal voltage and verify the voltage reading is < 1V

511

Output Mute Circuitry The muting and protection circuitry is virtually identical for all outputs. A 390 (Lower Bd,sheet 5 ohm resistor in series with the output of the op amp is followed by a FET Upper Bd,sheets 3,4) (Q200-207) to ground. thereby muting the output. The gate of the FET is AC coupled to its drain to enhance performance for large positive and negative signals. A pair of diodes back-biased to the voltage rails protect the CP-3 from high voltages due to improper termination of its...

64406635

SUPPORT,SIDE.2UX13.43 PL.ANLG BD ASSY.L0WER.CP-3 PL.HS ASSY,ANLG,CP-3 CABLE.079,SCKT SCKT.15C.6.5 PL.ANLG BD ASSY,UPPER,CP-3 CABLE ASSY.4C, 18G,6 ,SS HSG PL.DIGITAL BD ASSY,CP-3 PANEL, REAR.CP-3 ENDCAP.CP-3 LUG,SOLDER,LCKNG, 6,.020THK PANEL.DAMPING,5.0X6.0 COVER,TOP,2UX13.51,CP-3 PL,FP ASSY.CP-3 PANEL.SUB,FR0NT,CP-3 SUPPORT,CENTER,M300 COVER,PROTECTIVE,AC.CP-3 SPCR.PCB FOOT 250.NYL BRACKET.MTG.XFORMER.M300 TRANSF0RMER.P0WER.50VA PL.HS ASSY,PS,CP-3 PL,PS BD ASSY.CP-3,120V PL,PS BD ASSY.CP-3,100V...

Colsel

Front panel LED Row Select write port Front panel LED Column Select write port Front panel switch read port LCD Contrast control write port Video overlay data & control write port Master Slave Synchronization write port Infrared remote read port Write to LCD instruction register Read LCD instruction register Write to LCD character register Read LCD character register System Reset The reset circuitry insures proper operation of the CP-3 during power up and down by holding the reset signals...

Converter Calibration

Clean, antistatic, well lit work area Oscilloscope 60 MHz minimum with a X10 probe Low Distortion Oscillator single-ended 600 ohm output, < .005 THD Y Cable shielded audio Y cable with RCA plugs on the Y end and an appropriate connector on the other end for connection to the Low Distortion Oscillator output Attach an audio input Y cable between the Low Distortion Oscillator and both CP-3 INPUT 1 jacks. 1. Apply a 1kHz signal at -47.25dBV to both channels of INPUT 1. 2. Adjust R120 (left...

CP3 Master Slave Interface

Master Z80 requests Slave bus access. Decoding circuitry returns a wait signal to the Master Z80 until Slave bus is available. No wait signal is necessary if the Slave Z80 is in Reset. Decoding circuitry asserts the Access signal, removes the wait signal and the Master Z80 gains access to the Slave bus. Access Decoding SLVRAM and LEX are generated by the MasterSiavedecoder(U13).These signals are activated for either processor to access Slave RAM or the Lexichip. When access to the shared Slave...

D01fh

The MDAC Data Bus The MDAC data bus is buffered by U2 (1 B3) .which is an Octal Tri-State Buffer (74HC541) activated by the MDAC signal. Both the MDAC data bus and control bus (called GAIN on the schematics) have series 120 2 resistors on the Digital board (RP7 and RP8, 7 D3) and pull-up resistors on the upper Analog board. The control bus has 4.7K pull-up resistors (RP2, schem. 060-08127) except INWR . INWR and the data bus have 10k pull-up resistors (RP1,...

Digital Circuit Description

Overview The CP-3 Digital board contains both digital and video circuitry. Both, therefore, will be discussed in this section. The CP-3 utilizes two 280 microprocessors (Master and Slave) and the Lexichip Digital Signal Processor (DSP) to perform multiple digital audio effects. These effects are controlled via the front panel user interface or the Standard Expanded remote controls. Each Z80 processor has it own support circuitry, data and address busses. Although each processor is capable of...

Dolby Enable On

Procedure for Dolby Filter - Rear L & R Outputs 1. Apply a 1 kHz signal at +4 dBV (1.58 Vrms) to the CP-3 right input. 2. Connect the audio cable from the Distortion Analyzerto the CP-3 Right Rear Output jack. 3. Setthe scale on the Distortion Analyzerto measure +4 dBV (1.58 Vrms) signal level. 4. Verify that the output level from the CP-3 is +4 dBV (1.58 Vrms) + -0.5 dB. 5. Adjust the scale on the Distortion Meterto measure 0.025 THD+N and turn on the 30 kHz low pass or audio bandpass...

Fdir Enable On

Apply a 1 kHz signal at +4 dBV (1.58 Vrms) to the input channel. 3. Set the scale on the Distortion Analyzerto measure +4 dBV (1.58 Vrms) signal level. Make sure any filters are off. 4. Verify that the output level from the CP-3 is +4 dBV (1.58 Vrms) + -0.5 dB. 5. Use the output level from step 4 forthe 0 dB reference to check frequency response. Sweep the oscillator frequency from 10 Hz to 100 kHz. Verify the signal level is within +1 -3dB of the reference level over the frequency band. 6. Set...

Ground The Instrument

To minimize shock hazard the instrument chassis and cabinet must be connected to an electrical ground. The instrument is equipped with a three-conductor AC power cable. The power cable must either be plugged into an approved three-contact electrical outlet or used with a three-contact to two-contact adapter with the grounding wire (green) firmly connected to an electrical ground (safety ground) at the power outlet. The power jack and mating plug of the power cable meet International...

Hipass Enable On

Apply a 1 kHz signal at +4 dBV (1.58 Vrms) to the input channel. 4. Set the scale on the Distortion Analyzer to measure +4 dBV (1.58 Vrms) signal level. Make sure any filters are off. 5. Verify the output level from the CP-3 is +4 dBV (1.58 Vrms) + -0.5 dB. 6. Use the output level from step 5 forthe 0 dB reference to check frequency response. Sweep the oscillator frequency from 200 Hz to 100 kHz. Verify that the signal level is within +1 -3dB of the reference level over the frequency band. With...

Info

ROUT1 register bit functionality and active states. ROUT1 register bit functionality and active states. The ROUT2 register is implemented with a Quad D - Flip-Flop (U7) and a NOR gate (U5 + U4,2 A5-6). This NOR gate is used to generate REQEN, which routes the audio signal through the front Re-EQ filters. The REQEN signal is a combination of the THXEN signal (ROUT2 register) and the FPROCEN signal (ROUT1 register). FDIREN enables disables the direct audio signal path from the inputs to the front...

Initial Inspection

Clean, antistatic, well lit work area High Quality Music Source Playback System Compact Disc player, stereo amplifier, 2 full-range stereo speakers, stereo headphones and the proper cables for hooking up the system. Audio Patch Cables 2 single-ended, shielded audio cables with RCA plugs on both ends for connecting the outputs of the compact disc player to the inputs of the CP-3. 2 single-ended, shielded audio cables with RCA plugs on one end and appropriate connectors on the other end for...

Irclk

Clock signal forthe IR decoder (461 kHz). Decoded select signal forthe IR decoder. I O mapped address 07H. Input, Master Slave synchronizing signal Master NMI (Non-Maskable Interrupt). Power Fail detect signal (Iow shut down) Power down up protect signal forthe Master RAM

J

A Slave Z80 reset signal is active (low). C On rising edge of ZCLK, ACC is asserted, allowing Master Z80 access to Slave Bus. E On rising edge of ZCLK, ACC is deactivated and bus is returned to Slave Z80. A Slave Z80 reset signal is active (low). B Master Z80 requests access to Slave Bus by asserting MSREQ C On rising edge of ZCLK, ACC is asserted, allowing Master Z80 access to Slave Bus. D After read write operation is performed, MSREQ is de-activated. E On rising edge of ZCLK, ACC is...

L J

A The Master Z80 requests Slave access by asserting MSREQ B MWAIT is asserted to keep the Master Z80 in a wait state until the Refresh window occurs C SM1 Indicates Slave Z80 Instruction Fetch period D Slave reads instruction code from the Slave Data Bus E Slave Z80 places the contents of the program counter on the Slave (Shared) Address Bus F If MSREQ is asserted during the second T state of Instruction Fetch period (SM1 ), the Master Z80 is in sync with the Slave Z80 Refresh period, and no...

MSYNC Signaling

MSYNC is asserted during a Master Z80 I O write operation. As a result of MSYNC input, Slave Decoder asserts MWAIT until WCE is asserted. C WC is asserted and is extended to produce WCE D On rising edge of ZCLK, Slave Decoder, seeing WCE active, removes MWAIT signal. On rising edge of ZCLK, Master Z80 sees MWAIT removed and finishes the instruction. One wait state is assserted automatically by Z80 during I O operations. Additional wait states ocur if MWAIT is asserted. The Lexichip (U30,4...

Notes

PART NUMBER LISTING IS REFERENCE ONLY AND DOES MOT SUPERSEDE. THE BILL OF MATERIAL* D23-0S30& Z. U5E PNEUMATIC SYRINGE WITH FINE NEEDLE TO FILL THE GROOVE IN THE FROWT PANEL WITH A 5M00TH EVEN HEAD OF BUCK SUPER WEATHER STRIP 3 M -0800B. INSERT GREEN STRIPE. INTO GROOVE AMD SLIDE FROM SIQF. TO SIDE TO INSURE EVEN SPACING FROM El-JDS. PRESS GREEM STRIPE MTO GROOVE TO INSURE GOOD CONTACT WITH ADHESIVE. WHILE EVENLY POSITIONING STRIFE TOP TO BOTTOM IN GhOOVE. ALLOW 4 HOURS DRYING TIME fcSEFOKE...

Nut632kepzn

CABLE,079,SCKT SCKT,15C.8.0 CABLE,079,SCKT SCKT.15C.12 CABLE ASSY,4C, 18G, 13 .ST& T HSG CABLE ASSY.4C, 18G,7 ,TW HSG TIE,CABLE,NYL,.1X4 LABEL,PRODUCT ID.CP-3 LABEL,CSA CERTIFIED,CONSUMER LABEL,UL CERTIFIED,CONSUMER LABEL.TUV CERTIFIED,BAYERN WSHR.FLJ6CLX3 80DX1 16.FBR SLEEV1NG.SHRINK.3 16X1 2LG.BLK SCRW,6 32X3 8,PNH,PH,SEMS,BLK WSHR,FL, 6CLX3 80DX 1 32THK LABEL.DOLBY & THX LICENSE LABEL,WARNING,PERFORMANCE,GND LABEL, RISK OF SHOCK TAPE.FOAM 062X.20X.84

Performance Verification Required Equipment

Clean, antistatic, well lit work area Low Distortion Oscillator single-ended 600 ohm output, < .005 THD. THD+N Distortion Analyzer Level Meter with switchable 30kHz or audio bandpass filtering. single-ended, shielded audio cable with RCA plug on one end and an appropriate connector on the other end for connection to the Low Distortion Oscillator output. single-ended, shielded audio cable with RCA plug on one end and an appropriate connector on the other end for connection to the THD+N...

Power Supply

Variac 3 1 2 digit, 0.25 accuracy or better. 1. Inspect the CP-3 tor obvious signs of physical damage. Verify that all switches operate smoothly. 2. Remove the CP-3 top cover (16 screws) and bottom cover (7 screws) and verify that There is a protective shield under the fuse and other areas of the power supply board. The value of the fuse (F1) is correct for the AC line voltage the CP-3 will be operating from. 0.5 AMP 250V SLO-BLO 0.25 AMP 250V T

Replace Fuse Only With Same Type And Rating

All socketed ICs are fully and correctly seated. All ribbon cables are installed correctly and secure. The chassis ground connection from each RCA connector block on the digital and analog boards is secure and far enough away from surrounding signal pins to avoid shorts. There are no burnt or obviously damaged components. 1. Connect the CP-3 to a Variac or isolation transformer. 2. Power on the CP-3 with the rear panel power switch and slowly bring up the Variac to the required line voltage....

Routing Tests

If a different message is displayed, keep pressing BANK until this message is displayed. 7. Press the PROGRAM A button and verify that the INPUT 1 LED lights. Note All level references will be stated in terms of dBV and equivalent RMS volts (Vrms). If the test equipment used to perform these procedures is referenced to dBu or dBm, add 2.2 dB to the stated dBV values to convert to dBu or dBm. Input Test This test verifies the functionality of the Audio Inputs and Tape Outputs by checking gain,...

Side Source Is Front

Repeat steps 2-11 of this procedure to complete this test. Re-EQ and This test verifies the functionality of the Front Left, Center and Right Re -EQ Surround EQ Test and Rear Leit and Right Surround EQ circuits by checking gain, THD+N, and S N Ratio. Frequency response is not checked as part of this performance verification due to the complexity of the filters' responses. For reference, frequency response information is given in the Theory of Operation section of this manual. 1. Attach the...

Side Source Is Rear

Apply a 1 kHz signal at +4 dBV (1.58 Vrms) to the CP-3 right input. 3. Connect the audio cable from the Distortion Analyzer to the CP-3 Right Side Output jack. 4. Set the scale on the Distortion Analyzerto measure +4 dBV (1.58 Vrms) signal level. 5. Verify that the output level from the CP-3 is +4 dBV (1.58 Vrms) + -0.5 dB. 6. Adjust the scale on the Distortion Meterto measure 0.025 THD+N and turn on the 30 kHz low pass or audio bandpass filter. Verify that the THD is less than 0.025 . 7. Set...

Specifications

Minimum Input Level 300 mVrms for maximum output 50 mVrms for Dolby level Input Impedance 100 ki2 in parallel with lOOpf Video 3 composite, NTSC M standard Input Sensitivity and Impedance IV p-p, 75Q Outputs Audio 8 outputs (Left, Right, Center, Subwoofer, 2 Side, 2 Rear) Maximum Output Level 6 Vrms Output Impedance 500 Q Video 1 composite, NTSC M standard Output Level and Impedance IV p-p, 75 2 Frequency Response Unprocessed channels 10 Hz -100 kHz, +1, -3dB, Ref. 1 kHz Processed channels 10...

The Expanded Remote

The CP-3 can operate in one of four modes (PANORAMA, AMBIENCE, REVERB, or SURROUND). Each of these modes has a set of preset variations as listed on the Expanded remote (1-15). As many as 30 customized versions of these presets can be stored in User Registers. Allows selection and adjustment of all the interface functions of the CP-3 including Input and Output levels, visual displays, speaker configurations, etc. Saves in memory the settings from the SETUP mode and is used to memorize and store...

The Front Panel

The four INPUT buttons are used to select which input is processed by the CP-3. Pressing any one of these buttons will select that input and light the LED above it. The CP-3 can be programmed to engage a specific operating mode for each input, so changing inputs may change the mode being used. The INPUT LEVEL display monitors the level in the CP-3's digital encoding circuits and is used to indicate the correct Dolby level for video sound sources (marked by the double-D symbol between the LEDs.)...

The Standard Remote

The five operating mode buttons on the Standard Remote can be customized to load any of 45 operating modes. Turns off all outputs, lights both MAIN and EFX MUTE LEDs and displays SYSTEM MUTED. Pressing again will restore normal operation. (Because it is possible to alter the setting of the volume while Main Mute is on, check the volume before you turn the mute off again.) Turns off all signals added by the CP-3, lights the yellow EFFECTS MUTE LED on the front panel, and displays EFFECTS MUTED....

Thx Enable On

Procedure for Re-EQ - Front L & R, Center Outputs 1. Apply a 1 kHz signal at +4 dBV (1.58 Vrms) to the CP-3 right input. 2. Set the scale on the Distortion Analyzerto measure +4 dBV (1.58 Vrms) signal level. 3. Verify that the output level from the CP-3 is +4 dBV (1.58 Vrms) + -0.5 dB. 4. Adjust the scale on the Distortion Meterto measure 0.025 THD+N and turn on the 30 kHz low pass or audio bandpass filter. Verify the THD is less than 0.025 . 5. Set the scale on the Distortion Meter to...

U312

It should be noted that the THX filter enable, Front Processed output enable, and the Front Direct output enable, are all mutually exclusive when one is selected, the others are de-selected. Once in the Routing Tests, pressing SETUP on the remote will reset all of the routing parameters, as if the program were just loaded.

Video Calibration

Required Equipment Clean, antistatic, well lit work area 7-digit resolution with 10 MHz measurement capability Oscilloscope 1. Power off the CP-3 from the rear panel power switch. 2. Remove the CP-3 top cover (16 screws). Video HSYNC Free Running Frequency Adjustment Procedure 1. Install a jumper at W3 on the Digital board. 2. Power on the CP-3 from the rear panel power switch. 3. Connect the X1 probe from the frequency counter to TP1 on the Digital board. 4. For 100V-120V units, adjust R16 for...

Analog Circuit Description

Overview The CP-3 provides simultaneous switching capability for four stereo audio inputs and three composite video inputs. A single composite video output features an on screen display. The associated video overlay circuitry resides on the digital PC board and is described in the digital theory of operation. Eight audio outputs include left front, right front, center, subwoofer, two sides and two rears. Five outputs are created internally by time sharing two 16-bit digital-to-analog converters...

Power Supply Circuit Description

The CP-3 has an internal supply which produces the required DC supplies Overview from various line voltages. It may be strapped for line voltages of 100,120, 220 and 240 VAC at either50 or60 Hz. All DC voltages are produced by linear supplies. A bipolar 15 volt supply is required by the analog electronics and is regulated locally on the lower analog board. The digital and video electronics each require +5 volts. One regulator, located on the power supply board, is used for both supplies....

CP3 ROM Address Space

System ROM space. kXVI Jumpers W1 and W2 IN. System ROM space. KXX1 Jumpers W1 and W2 IN or OUT. Overlapping ROM space allocated for system code and diagnostic reset and interrupt vectors. V , Jumpers W1 and W2 OUT. Diagnostic code ROM space. This figure shows how the physical ROM space is split between the Diagnostic and System code. Shared space is used by the System code, except C000 -C08FH which is reserved for Diagnostic code Reset- and Interrupt- vectors. Master...

204vac

Return the Variac to nominal AC line voltage. 3. Return the Variac to nominal AC line voltage. Power off the CP-3 using the rear panel power switch. Measure the battery voltage at U33 pin 28 to ground and verify that it is > 2.50 VDC. Power on the CP-3 using the rear panel power switch. Alternately set the Variac to both extremes of the AC line voltage operating range given in Table 4.2 and verify that the regulated supply rails remain within their tolerance range. Then, return the Variac to...

CP3 Digital Circuitry Block Diagram

Z80 Diagram Blocks

During normal operation, sampled audio is converted into digital data by successive approximation A D converters. Digital effects processing is performed by the Lexichip under the control of both Master and Slave Z80 processors. The Lexichip controls not only the effects processing, but also the Analog-to-Digital and Digital-to-Analog conversions. The Master Z80, which handles all operator I O and housekeeping functions, is able to pass DSP control information to the other two processors. The...

Antenna Discharge Unit

Service Ground Electrode Location

Read Instructions Read all safety and operating Instructions before operating the unit. Retain Instructions Keep the safety and operating instructions for future reference. Heed Warnings Adhere to all warnings on the unit and in the operating instructions. Follow Instructions Follow operating and use instructions. Heat Keep the unit away from heat sources such as radiators, heat registers, stoves, etc., including amplifiers which produce heat. Ventilation Make sure that the location orposition...