000025

And from Eq. 15.5, for an Ipmd of 0.25 mA, an Ipl of 4.61 A, and an Rs of 0.25 ft And to minimize drift in EA2 (Fig. 15.7), R3 is set equal to R2. 15.4.5 Boost switching frequency with the UC 3854 In addition to determining the current out of the M& D at pin 5, because of internal circuit details, R1A also sets the boost switching frequency. Once R1A has been fixed, the boost switching frequency is fixed by where Cll is the capacitor to ground at pin 14. For7 14 in ohms and Cll in farads, F...

0075

The remaining height in bobbin must accommodate primary-to-secondary insulation plus the filament wires (about one turn of no. 22 wire at 0.0281-in diameter). Obviously the E625 core is marginal of the other two, the ETD44 appears preferable. 16.6.7 Toroidal core transformer for current-fed topology The circumference of the inside diameter (ID) of a toroid (it X ID) is much greater than the bobbin width of an EE core of roughly equal Ae. Hence the toroid permits more turns per layer than the EE...

015 011

Figure 4.2 Inductance per 1000 turns (Alg) for various ferrite cores with various air gaps. Also the point in ampere turns cliff' point where saturation commences. (Courtesy Ferroxcube Corporation.) Figure 4.2 Inductance per 1000 turns (Alg) for various ferrite cores with various air gaps. Also the point in ampere turns cliff' point where saturation commences. (Courtesy Ferroxcube Corporation.) available for all cores at various air gaps, Eq. 4.14 would give the number of turns for any selected...

02 X 141p 0282p

Now select V as 10 percent above V the sine wave peak at maximum rms input voltage. Then - ( V> T T 1--I (15.12) But Vp Vp VrmJVrms. And taking V , 90 V and V 250 V from Eq. 15.12, ( Ilf o 0-67371 (1513) Thus for Vrms 90 V, frequency 100 kHz (t 10 xs), e 85 percent, and po - 250 W, from Eq. 15.14 i-i 3.37(902)(10 X 10 6)(0.85) QOQ L1 _ 928 15.4.7 Selection of boost output capacitor Refer to Fig. 15.10. The boost capacitor Co usually feeds a DC DC converter generally a half bridge for output...

025r1

Since the doubled-frequency forward converter has twice the rms current, it will have twice the wire area of the original converter of half the output power. And since it has half the number of primary turns, its resistance is one-fourth the resistance of the original forward converter. With twice the rms current, its I2R losses are equal to that of the original forward converter of half the output power. 7.3.3 Derivation of output power relations for half-bridge topology The half bridge is...

03

Figure 10.2 Toshiba MB amorphous core, BH loop at 100 kHz. In magnetic-amplifier operation, the core moves along a minor loop 01234567890. In going from 1 to 4, the core is on the steep part of the hysteresis loop and the MA has high impedance. At point 4, the core saturates and the MA has essentially zero impedance. At the end of the Q1 on time (Fig. 10.1), the core is reset to Bv The time to move from Bx to +B, is the switch-open time. The further down Bx is pushed, the longer the blocking or...

How To Repair Tektronix Switch Mode Powersupply

Thus the Baker clamp has satisfactorily solved two significant problems. It prevents a sufficient forward bias on the base-to-collector junction to cause appreciable storage time. It also permits the circuit to work equally well with large changes in load current and over a large production spread in transistor beta because of the redistribution of input currents between D2 and D3 as base current demands change. However, it is still desired to provide reverse base current to at the instant of...

1

The feedback loop regulates against DC input voltage changes by decreasing Ton as Vdc increases, or increasing toa as Vdc decreases. 4.4.2.2 Input, output current-power relations. In Fig. 4.6, the output power is equal to the output voltage times the average of the secondary current pulses. For equal to the current at the center of the ramp in the secondary current pulse Figure 4.6 Current-on-time relations in a continuous-mode flyback. Current is delivered to the load only during the off time....

1 ka und i VNArtL

The first integrated-circuit pulse-width-modulating control chip. (Courtesy Silicon General Corp.) Figure 5.2 (b) PWM UC1846. The first integrated-circuit current-mode control chip. (Courtesy Unitrode Corp.) Figure 5.2 (b) PWM UC1846. The first integrated-circuit current-mode control chip. (Courtesy Unitrode Corp.)

1 V

It can be seen from Eq. 17.7 or 17.8 that for a constant toS, as Vn goes up, to keep V constant, frequency f must go up. Regulation can be seen as follows (Fig. 17.12). When Q1 is on, P drive, pin 1 is low, keeping the P-channel MOS-FET on. And N drive, pin 14 is also low, keeping the iV-channel MOS-FET off. The four elements No, II, Na, 12 form a set-reset flip-flop (FF1), and hence the P and N drive outputs remain locked in the low state, keeping Ql on and Q2 off until the flip-flop is reset....

10

In that figure, the gain slope breaks from a - 2 to a -1 slope at the so-called ESR zero frequency of Fesr 1 2-irResrC0. Recall that at Fesr, the impedance of Ca equals that of Resr. Beyond Fesr, the impedance of Ca becomes smaller than i esr and the circuit becomes increasingly like an LR rather than an LC circuit. Moreover, an LR circuit can cause only a 90 phase lag as compared to the possible maximum of 180 for an LC circuit. Thus the ESR zero creates a boost in phase over...

1000

Note Data are for bipolar magnetic circuits (first- and third-quadrant operation). For unipolar circuits (forward converter, flyback), divide by 2. Association (MMPA)5'6 and IEC publications from the American National Standards Institute.7 The various core geometries shown in Fig. 7.2 are pot or cup cores, RM cores, EE cores, PQ cores, UU or UI cores. The pot core is shown in Fig. 7.2e. It is used mostly at low power levels up to 125 W and usually in DC DC converters. Its major advantage is...

102 Linear and Buck Regulator Postregulators

A linear regulating postregulator is the best approach for output currents up to 1.5 A. The 1.5-A limit comes about because of low cost and low internal dissipation. Linear regulators with up to 1.5 A of output current are available as integrated circuits in plastic T0220 packages at a cost of about 500. They require no additional external components other than a small filter capacitor. They are usually specified as requiring 2 V (typically, 3 V for the worst case) minimum input-output...

1034 Slave output voltage shutdown with magnetic amplifiers

Heretofore, the magnetic amplifier was presented only as a means of voltage regulating the slave output voltage. That was done by controlling the flux level to which the core is reset at the end of the power transistor on time. The further down Bx was pushed, the longer the blocking time tb, the shorter the firing time tf, and hence the lower the DC output voltage. The magnetic amplifier can also be used to shut down the DC output voltage completely. This is done by pushing the initial flux...

1036 Core loss and temperature rise calculations

Toshiba provides curves useful in calculating core temperature rise for each of its cores. Figures 10.9, 10.10, and 10.11 show core loss versus toted flux change in maxwells for its three largest MB cores. Recall that flux change in maxwells equals flux density change in gauss multiplied by core area in square centimeters. Thus, dividing the maxwells shown in the curves by the core area gives the flux density change in gauss. The maximum maxwells shown on the curves then correspond to the total...

1037 Design examplemagneticamplifier postregulator

Design a magnetic-amplifier postregulator for the output of the forward converter shown in Fig. 10.13a. Specifications are Forward converter switching frequency 100 kHz Slave output voltage 15 V The main output voltage is Vom Vdc(Nsm Np)(tOQ T). The main feedback loop, in keeping Vom constant, then must keep the product Vdcton constant. Thus ton is a maximum when Vdc is a minimum. In the usual case, the number of turns on the T1 reset winding Nr is set equal to the turns on the power winding...

113 RCD Turnoff Snubber Operation

In Fig. 11.1a, when the Q1 base receives its turnoff command, the transformer leakage inductance attempts to maintain the peak on current which had been flowing just before the turnoff command. That peak current divides in some way between the off-turning collector and CI through diode D1 which has latched in. The amount of current IC1 flowing into CI slows up the collector voltage rise time, and by making CI large enough, the rising collector voltage and falling collector current intersect so...

1151 rcd snubber returned to positive supply rail

The RCD snubber is often (and preferably) returned to the positive supply rail as shown in Fig. 11.3. It works exactly in the same way as when it is returned to ground as in Fig. 11.1. At turnoff, D1 latches in and CI slows up collector voltage rise time with its charging current flowing into Vdc. At the following turnon, CI is discharged through Ql and the supply source Vdc. The advantage of returning i l, D1 to Vdc instead of to ground is Figure 11.3 When snubber is returned to positive rail,...

117 Snubber Reduction of Leakage Inductance Spike to Avoid Second Breakdown

The snubber offers a second very important advantage in addition to slowing up voltage rise time and thus decreasing average transistor dissipation. It prevents second breakdown, which occurs if the instantaneous voltage and current cross the reverse-bias safe operating area (RBSOA) boundary given in the manufacturer's data sheets (Fig. 11.5). This boundary can be crossed by the omnipresent leakage inductance spike (Fig. 2.10) which occurs at the instant of turnoff. Transistor manufacturers...

120220 V Ac

Figure 13.4 (a) A series-loaded resonant half bridge. Inductance Lr resonates with capacitance Cr The load is reflected by 71 in series with the resonant circuit. Transistors are turned off directly after the end of the first half cycle of resonant current to achieve zero current switching. In series loading, the output filter is capacitive. (6) A parallel-loaded resonant half bridge. Inductance Lr resonates with capacitance C The load is reflected by T1 in shunt with the resonating capacitor....

121 Introduction

Before going into the details of stabilizing a feedback loop, it is of interest to consider in a semiquantitative way, why a feedback loop may oscillate. Consider the negative-feedback loop for a typical forward converter in Fig. 12.1. The essential error-amplifier and PWM functions are contained in all pulse-width-modulating chip. The chip also provide many other functions, but for understanding the stability problem, only the error amplifier and pulse-width modulator need be considered. For...

1210 Type 3 Error Amplifier When Used and Transfer Function

In Sec. 2.3.11.2, it was pointed out that the output ripple Vor Ra dl where Ra is the ESR of the filter output capacitor Ca and dl is twice the minimum DC current. Now most aluminum electrolytic capacitors do have an ESR. Study of many capacitor manufacturers' catalogs indicates that for such capacitors, R0C0 is constant and equal to an average value of 65 x 10 6. Thus, using conventional aluminum electrolytic capacitors, the only way to reduce output ripple is to decrease Ra, which can be done...

1211 Phase Lag through a Type 3 Error Amplifier as Function of Zero and Pole Locations

In Sec. 12.7, it was pointed out that the phase boost at a frequency Fco due to a zero at a frequency Fz is 0zb taxx 1(FcJFz) tan-1 K (Eq. 12.4). If there are two zeros at the frequency Fz, the boosts are additive. Thus boost at Fco due to two zeros at the same frequency Fz is e2zb 2 tan-1 K. Similarly, the lag at Fco due to a pole at Fp is 9Jp tan-1(lIK) (Eq. 12.5). The lags due to two poles at Fp are also additive. Thus lag at Fco due to two poles at Fp is 012p 2 tan_1(l ifj. The lag and...

1212 Type 3 Error Amplifier Schematic Transfer Function and Zero and Pole Locations

The schematic of a circuit which has the gain-versus-frequency characteristic of Fig. 12.146 is shown in Fig. 12.15. Its transfer function can be derived in the manner described in Sec. 12.6 for the Type 2 error amplifier. Impedances of the feedback and input arm are expressed in terms of the s operator, and the transfer function is simply G(s) Z2(s) Zl(s). Algebraic manipulation yields the following expression for the transfer function dV0 (1 + sR2Cl) l + s(Rl + R3)C3 G(S) dV sRl(Cl + C2)(l +...

1213 Design Example Stabilizing a Forward Converter Feedback Loop with a Type 3 Error Amplifier

Design the feedback loop for a forward converter having the following specifications Switching frequency 50 kHz Output ripple (peak to peak) < 20 mV Assume that the output capacitor is zero ESR. First the output LC filter and its Refer to Fig. 12.15. From Eq. 2.47 of the type advertised as having corner frequency are calculated. Now it was assumed that the output capacitor had zero ESR so that ripple due to ESR should be zero. But there is a small capacitive ripple component (Sec. 1.2.7)....

1214 Component Selection to Yield Desired Type 3 Error Amplifier Gain Curve

There are six components to be selected CR1, R2, R3, CI, C2, C3) and four equations for zero and pole frequencies (Eqs. 12.12 to 12.15). Arbitrarily choose R1 1000 ft. Now the first zero (at 2000 Hz) occurs when R2 Xcl and the impedance of the feedback arm at that frequency is mainly that of R2 itself. Thus gain at 2000 Hz is R2 R1. From Fig. 12.16, gain of the error amplifier at 2000 Hz is +37 dB or a numerical gain of 70.8. Then for Rl IK, R2 70.8K, from Eq. 12.12, we obtain l 2u(0.08 x...

1215 Conditional Stability in Feedback Loops

A feedback loop may be stable under normal operating conditions when it is up and running, but can be shocked into continuous oscillation at turnon or by a line input transient. This odd situation, called conditional stability, can be understood from Fig. 12.17a and 12.176. Figure 12.17aand 12.176 contains plots of total open-loop phase shift and total open-loop gain versus frequency, respectively. Conditional stability may arise if there are two frequencies (points A and C) at which the total...

1216 Stabilizing a Discontinuous Mode Flyback Converter

12.16.1 DC gain from error-amplifier output to output voltage node The essential elements of the loop are shown in Fig. 12.18a. The first step in designing the feedback loop is to calculate its DC or low-frequency gain from the error-amplifier output to the output voltage node. Assume an efficiency of 80 percent. Then from Eq. 4.2a

1217 Error Amplifier Transfer Function for Discontinuous Mode Flyback

In Fig. 12.19, for Ro(min), on curve EFGH, Fm will be established at one-fifth the switching frequency (point PI) as stated in Sec. 12.3. Most often, Fc0 will occur on the horizontal slope of the output circuit transfer function. To force Fco to be at the desired point, the error amplifier will be designed to have a gain at Fco (point PI) equal and opposite to the output circuit loss at point PI. Since the slope of EFGH at Fco is horizon tal, the error-amplifier gain slope must be -1 (in the...

124 Error Amplifier Transfer Function Poles and Zeros

The circuit of an operational amplifier with a complex impedance Zx input arm and a complex impedance Z2 feedback arm is shown in Fig. 12.9. Its gain is Z2jZ1. If Zx is a pure resistor i l and Z2 is a pure re- Figure 12.8 Where to locate break frequencies Fz and Fp. The farther apart Fz and Fp are spread, the greater the phase margin. But spreading them further apart reduces low-frequency gain, which reduces the degeneration of low-frequency line ripple. It also increases high gain, which...

125 Rules for Gain Slope Changes Due to Zero and Pole Frequencies

The zero and pole frequencies represent points where the error-amplifier gain slope changes. A zero represents a +1 change in gain slope. Thus (Fig. 12.10a), if a zero appears at a point in frequency where the gain slope is zero, it turns the gain into a +1 slope. If it appears where the original gain slope is -1 (Fig. 12.106), it turns the gain slope to zero. Or if there are two zeros at the same frequency (two factors in the numerator of Eq. 12.3 having the same RC product) where the original...

127 Calculation of Type 2 Error Amplifier Phase Shift from Its Zero and Pole Locations

Adopting Venable's scheme,1 the ratio Fco Fz if will be chosen equal to Fp Fco K. Now a zero, like an RC differentiator (Fig. 12.26), causes a phase lead. A pole, like an RC integrator (Fig. 12.2a), causes a phase lag. The phase lead at a frequency F due to a zero at a frequency Fz is But we are interested in the phase lead at Fco due to a zero at a frequency Fz. This is 9ld(ati 0) tan1 (12.5) The phase lag at a frequency F due to a pole at a frequency Fp is and we are interested in the lag at...

128Phase Shift through LC Filter Having ESR in Its Output Capacitor

The total open-loop phase shift consists of that through the error amplifier plus that through the output LC filter. Figure 12.36 showed for Rn 20 VE CQ and no ESR in the filter capacitor, the lag through the filter itself is already 175 at 1.2F0. This lag is modified significantly if the output capacitor has an ESR table 12.1 Phase Lag through a Type 2 Error Amplifier for Various Values of K( FJFZ VFco) table 12.1 Phase Lag through a Type 2 Error Amplifier for Various Values of K( FJFZ VFco)

133 Resonant Converter Operating Modes

13.3.1 Discontinuous and continuous above resonance and below resonance operating modes Operating modes can be discontinuous as in Fig. 13.1. In the discontinuous mode (DCM), as noted, output voltage regulation is accomplished by varying the switching frequency. Power is delivered to the load as sequence of discrete current or power pulses separated by times long compared to their duration. If the output voltage must be raised because Vdc has gone down or DC load current has been increased, the...

14

MPP cores OD 0.8 in, ID 0.5 in, height 0.25 in, lm 5.09 cm. All inductances in microhenries. Note Magnetics Inc. MPP cores OD 0.8 in, ID 0.5 in, height 0.25 in, lm 5.09 cm. All inductances in microhenries. table 4.3 Maximum Number of Turns and Maximum Inductance at Those Turns for Various Peak Currents lp at a Maximum Inductance Falloff of 10 Percent from Zero Current Level

141v T

Then from Eq. 15.19, Ipk t 2.82PJEVrms Now assume nominal, minimum, and maximum rms input voltages of 120, 92, and 138 V. For V . 92 V, Pa 80 W, and E 0.95, (92)2 X 0.95T L1 H O 50To* (5'21) If a Ton of 10 xs is selected, LI is 500 (jlH from Eq. 15.21 which is reasonably small for a peak ramp current of I k t 1.41 X 92 x 10 X 10-6 (500 X 106) 2.59 A. Now the boosted voltage must be above the sine wave peak at maximum line input. For Vrms 138 V, the sine wave peak is 1.41 X 138 195 V. If it is...

142 Forward Converter Waveshapes

The circuit schematic for these waveshapes is shown in Fig. 14.1. It is a 125-kHz forward converter designed for 100 W, and waveshapes are shown at 80 and 40 percent of full load. Full-load outputs are 5 V at 10 A and 13 V at 3.8 A. Waveshapes are shown for nominal input volt- C, 160 HF, 100 V C2 3200 HF, 16 V C3 1500 (IF, 25 V C4. Cs 1.0 HF. 50 V D2, D3 MBR 1045 D4, 06 MBR 415 D,. 1N 4937 Q,. RFP 12N18 Vde 38-60 V C, 1.0 (iF Tl core-782E272-3F3 (Ferroxcube) Np-13 Turns, 2 18 in parallel N5-5...

16

2.3.9.1 First-quadrant operation only. The transformer core in the forward converter operates in the first quadrant of the hysteresis loop only. This can be seen in Fig. 2.10. When Q1 is on, the dot end of T1 is positive with respect to the no-dot end and the core is driven, say, in a positive direction on the hysteresis loop and the magnetizing current ramps up linearly in the magnetizing inductance. When Q1 turns off, stored current in the magnetizing inductance reverses the polarity of...

1a

Ground, and RA and D2 in series charge the positive end of C2 up to one diode drop below V0. Thus if the drops in Dl and D2 are almost equal, C2 is charged up to a voltage closely equal to V. Now the voltage across C2 moves up and down with the negative end of the internal reference voltage (GND pin), and it is that voltage which is regulated. Regulators like those in Fig. 17.16 are designed as buck regulators with the internal power transistor emitter connected to the Vsw pin so that it can...

2 4 6 810

Figure 16.2 Fluorescent lamp light output in lumens per watt. For T12(1.5-in lamp diameter) and T17(1.88-in lamp diameter) versus frequency. (From High-Frequency Fluorescent Lamps, Campbell, Schultz, Kershaw, Illumination Engineering, Feb. 1953.) smaller and lighter, had no audible noise, and was less expensive. And at this high frequency, the lamp showed no flicker and conducted and radiated EMI was easier to suppress. These advantages of high-frequency operation, though significant, could not...

2 T

Figure 12.18 Discontinuous-mode flyback feedback loop. Figure 12.18 Discontinuous-mode flyback feedback loop. Referring to Fig. 12.186, it is seen that the PWM compares the output of the error amplifier Vea to a 0- to 3-V triangle. It generates a rectangular pulse whose width (Ton Fig. 12.18c) is equal to the time from the start of the triangle to its intersection with DC voltage level Veii. This Ton will be the on time of power transistor Ql. It is seen in Fig. 12.186 that Vea 3 T0JT or Ton...

200 X 1q6

Sprague 673D, 674D aluminum electrolytics Now assume a regulator boosting from +5 to +15 V with 25-W (1.66-A) output. Assume a Mallory VPR 200 mF capacitor rated at 25 V. Then from the above relation Then from the above relation, the peak-to-peak ripple is V r 4 dco (ESR) 4 X 1.66 X 0.145 0.963 V. Modern tantalum capacitors may have lower ESR and yield lower ripple. Ripple may be reduced by increasing capacitance, using capacitors with higher voltage ratings or paralleling capacitors. All these...

24

MPP cores OD 1.84 in, ID 0.95 in, height 0.71 in, lm 10.74 in. All inductances in microhenries. Note Magnetics Inc. MPP cores OD 1.84 in, ID 0.95 in, height 0.71 in, lm 10.74 in. All inductances in microhenries. the on time, that primary peak current, multiplied by the turns ratio Np Ns is driven into the secondary where it decays linearly as shown in Fig. 4.1c. In most cases, output voltages are low and input voltages are higher, resulting in a large Np Ns ratio and a...

3 40

Figure 12.2 (a) An RC integrator has a gain dVa dVin of -20 dB decade beyond Fp VvnRlCl. If the scales are such that 20 dB is the same linear distance as 1 decade in frequency, a gain slope of - 20 dB decade has a -1 slope. Such a circuit is referred to as a -1 slope circuit. (6) An RC differentiator has a gain of +20 dB decade. At Fz H2-R2C2, where XC2 R2, gain asymptotically approaches 0 dB. If scales are such that 20 dB is the same linear distance as 1 decade in frequency, a gain slope of +...

3 6 91215

Figure 2.3 Hysteresis loop of a typical ferrite core material (Ferroxcube 3C8). Flux excursions are generally limited to 2000 G up to about 30 kHz by requirement to stay on the linear part of the loop. At frequencies of 100 to 300 kHz, peak flux excursions must be reduced to about 1200 or 800 G because of core losses at these higher frequencies. of the push-pull topology or to applications where simple and inexpensive fixes could avoid the problem. This subtle failure mode in push-pull...

3000

But in forward converters and flybacks, operation is over the first quadrant only. Since ferrite core losses are hysteresis losses only and these losses are proportional to the area of the hysteresis loop, it might be thought that in unipolar magnetic circuits where only half of the hysteresis loop is traversed, core losses would be half those given for bipolar circuits at the same peak flux density. There is considerable difference of opinion among...

350

250 300 350 400 450 500 550 600 650 700 750 Wavelength (nanometers) Figure 16.4 Spectral energy distribution from a 40-Wo white fluorescent lamp. In microwatts per nanometer (1 nm 10 A). The smooth curve is the continuous spectrum of energy generated by the white phosphorous. The discrete bands, 10 nm wide, represent energy generated by the mercury atoms in transition from a high to a low energy level. (Courtesy General Electric Bulletin Fluorescent Lamps.) 250 300 350 400 450 500 550 600 650...

38

With its large distributed air gap, it can tolerate a large DC current bias without saturating. It is available in a large range of different geometries. (Courtesy Magnetics Inc.) Figure 4.4 Falloff in permeability or A1 for MPP cores of various permeabilities versus DC magnetizing force in oersteds. (Courtesy Magnetics Inc.) Figure 4.4 Falloff in permeability or A1 for MPP cores of various permeabilities versus DC magnetizing force in oersteds. (Courtesy...

38 V 49 V

Lp (calculated in Sec. 4.3.2.7) 56.6 p,H Recall from Sec. 4.3.2.7 that Ca was calculated as 2000 i,F. But it was pointed out there that at the instant of turnoff, the peak secondary current of 66 A would cause a thin spike of 66 x 0.03 2 V across the anticipated ESR of 0.03 V for a 2000- xF capacitor. It was noted that either this thin spike could be integrated away with a small LC circuit or CD could be increased to lower its ESR. Here, both will be done. Capacitance Ca will be increased to...

4

Figure 5.7 Slope compensation in the UC1846 current-mode control chip. A positive ramp voltage is taken off the top of the timing capacitor, scaled by resistors i x, R2 and added to the voltage at the top of the current resistor R,. By choosing Rlt R2 to make the slope of the voltage added to V, equal to half the downslope of the output inductor current, reflected into the primary and multiplied by R the output inductor average current is rendered independent of power transistor on times....

46

Figure 16.11 (a) American National Standards Institute (ANSI) specifications for various fluorescent lamps (6) volt ampere characteristics at different operating currents for various hot cold cathode lamps. Figure 16.12 Block diagram of a modern fluorescent lamp light source. Output frequency of the DC AC inverter is set by a series or parallel self-resonant oscillator in the range of 20 to 50 kHz. The ballast is usually a capacitor or the controlled source impedance of a series LC resonant...

5

All cores have outer diameter (OD) 1.060 in, inner diameter (ID) 0.58 in, height 0.44 in, lm 6.35 cm. All inductances in microhenries. greater than the desired value is reached. The core at that point is the only one which can yield the desired inductance with only a 10 percent swing. The number of turns Nd on that core for a desired inductance Ld is within 5 percent given by where Al is the value in column 3 in Table 4.1. If, moving vertically, no core can be...

710

It thus can be seen that at higher DC output voltages, the efficiency is significantly higher than at lower voltages. When realistic input line ripple voltages are assumed, efficiency for 5-V output for input line tolerances of 15 percent are in the range 32 to 35 percent. 1.2.4 Linear regulator efficiency versus output voltage When ripple is taken into account, the minimum headroom of 2.5 V must be guaranteed at the bottom of the ripple triangle at the low tolerance limit of the input AC...

747

Figure 14.20 Significant waveforms in 50-kHz flyback supply of Fig. 14.18. Figure 14.20 Significant waveforms in 50-kHz flyback supply of Fig. 14.18. Voltage and current into 15 V rectifier (03, Fig. 14.18) Voltage and current into 5 V rectifier (D2, Fig. 14.18) Voltage and current into 15 V rectifier (03, Fig. 14.18) V15 current 0.39 A, voltage 19.39 V V5 current 2.08 A, voltage 5.00 V Voltage and current into 5 V rectifier (D2, Fig. 14.18) V,5 current 0.39 A, voltage 19.39 V V5 current 2.08...

756 Proximity effect

Proximity effect11-15 is caused by alternating magnetic fields arising from currents in adjacent wires or, more seriously, from currents in adjacent winding layers in a multilayer coil. It is more serious than skin effect because the latter increases copper losses only by restricting the conducting area of the wire to a thin skin on its surface. But it does not change the magnitude of the currents flowing only the current density at the wire surfaces. In contrast, in proximity effect, eddy...

780

Figure 14.13 Transformer center tap current and drain-to-source voltage (Q2i at minimum (photo PP13), nominal (photo PP14), and maximum (photo PP15) input voltage for one-fifth of maximum output currents. ing current or for a given maximum magnetizing current, from too low a total DC output current. The magnetizing current can become larger than originally specified if the two transformer halves inadvertently separate slightly, thus decreasing the magnetizing inductance and increasing the...

819

Figure 14.10 Significant waveforms in 200-kHz 85-W converter of Fig. 14.8. The assumption that the amplitude measured with a current probe in the drain as for photo PP6 is more valid than the measurement with the same probe in the transformer center tap (as photos PP1 to PP3) is verified by measuring voltage drop across a small current-monitoring resistor in series in the transistor source. Measurement with a current probe in series in the drain gives exactly the same absolute currents as does...

823 A spike of high reverse base current a at the instant of turnoff Fig 82a

If base input current is simply dropped to zero when it is desired to turn off, collector current will remain unchanged for a certain time (storage time ts). Collector voltage will remain at its low Vce(sat) value of about 0.5 V and when it finally rises, will have a relatively slow rise time. This comes about because the base-to-emitter circuit acts like a charged capacitor. Collector current keeps flowing until the stored base charges drain away through the external base-to-emitter resistor....

831 Baker clamp operation

In Fig. 8.6, a large current Ix of the desired pulse width is provided at the anode of D2. The current is large enough and has a sufficient overdrive to turn on the maximum current in Ql with the desired speed when Ql is a minimum beta transistor. As Ql commences turning on, D3 is reverse-biased, draws no current, and is effectively out of the circuit. All the 71 flows through D2 into the base, yielding very fast rise time. However, when the collector voltage has fallen low enough to...

832 Transformer coupling into a Baker clamp

8.3.2.1 Transformer supply voltage, turns ratio selection, and primary and secondary current limiting. The circuit of Fig. 8.7 provides all the required drive characteristics for the Baker clamp high forward and reverse base drive for Q2 at relatively low primary current drawn from the housekeeping supply Vh. It also provides the reverse Q2 base voltage which permits it to tolerate its Vcov rating. It works as follows. First, the T1 turns ratio Np Ns is chosen as large as conveniently possible...

836 Miscellaneous base drive schemes

A wide variety of specialized bipolar base drive schemes have evolved through the years. They are more often used at lower power levels and, by various circuit tricks, seek to achieve two common goals. (1) a low-parts-count scheme to obtain substantial reverse base voltage, reverse base current, or a base-emitter short circuit at turnoff and at turnon and (2) forward base current adequate to drive lowest beta transistors at maximum current without long storage times for high beta transistors at...

91

Figure 14.3 The 125-kHz 100-W forward converter of Fig. 14.1 at 40 percent full load. they come at a high repetition rate, their average dissipation can be high and can exceed the conduction dissipation of VdsIdston T. The overlap dissipation at turnon is not as serious as at turnoff. At turnon, the power transformer leakage inductance presents an infinite impedance for a short time and causes a very fast drain-to-source voltage fall time. The same leakage inductance does not permit a very fast...

92

Its length and resistance in ohms per foot as read from the wire tables for the selected wire size. It was also assumed that 7rms is the rms current as calculated from its waveshape (Sees. 2.2.10.2, 2.3.10.4). There are two effects, skin and proximity effects, which can cause the winding losses to be significantly greater than (Irms)2Rdc Both skin and proximity effects arise from eddy currents which are induced by varying magnetic fields in the coil. Skin effect is caused by eddy currents...

923 Mosfet gate rise and fall times for desired drain current rise and fall times

Very rapid drain current rise and fall times are undesirable as they cause large L di dt spikes on ground buses, supply rails, and large C dV dt capacitatively coupled spikes into adjacent wires or nodes. The question thus arises as to what gate voltage rise time is required to yield a desired drain current rise time. This can be seen from the transfer characteristics shown in Fig. 9.36 and 9.3d. In a MOSFET, switching time between zero and a drain current Id is only the times required for the...

929 Paralleling MOSFETs7

In paralleling MOSFETs, two situations must be considered (1) whether the paralleled devices share current equally in the static case when they are fully on and (2) whether they share current equally during the dynamic turnon-to-turnoff transition. With paralleled MOSFETs, in either the static or dynamic case, the concern is that if one MOSFET hogs a disproportionate part of the current, it will run hotter, and long-term reliability will decrease or, in the short run, will fail. Unequal static...

D2

Figure 6.22 (a) Basic Royer oscillator. (b) Square hysteresis loop of T1 core, (c) Characteristic high current spikes at end of on time. These spikes are major drawbacks in Royer oscillators. As long as the core is on the vertical part of its hysteresis loop, the positive feedback from Np to Nb widings keeps a transistor on and in saturation. When the core has moved to either the top or the bottom of its hysteresis loop, coupling between the collector and base windings immediately drops to zero...

E2

Figure 5.1 A basic voltage-mode PWM controller. Output voltage only is directly sensed by the error amplifier. Regulation against load current changes occurs only after the current changes cause small output voltage changes. The current-limit amplifier operates only to shut down the supply when a maximum current limit is exceeded. Transistor on time is from start of sawtooth until the sawtooth crosses V . amplifier that the fraction of the output KVa is fed to the inverting input so that when...

Flyback Converter Topologies

All topologies discussed thus far, with the exception of the boost regulator (Sec. 1.4) and the polarity inverter (Sec. 1.5) deliver power to their loads during the time when the power transistor is turned on. Flyback topologies described in this chapter operate in a fundamentally different way. During their power transistor on time, they store energy in their power transformer while load current is supplied from an output filter capacitor. When the power transistor turns off, the energy stored...

High Frequenc for

High-frequency power sources for enormously high-volume market for supplies. This may be appreciated the mid-1980s, shipment of fluores million annually.1 From the introduction of the fluor 1970s, fluorescent lamps were drivi line via a series inductor or via a 60 combination. The inductor or tran ferred to as magnetic ballast (Fig. K The series inductor is essential e ment because the lamp's volt ampe tive input impedance. The signific input current increases, its voltage from a...

High Frequency Power Sources for Fluorescent Lamps

16.1 Why High-Frequency Power Sources High-frequency power sources for fluorescent lamps represent an enormously high-volume market for the technique of switching power supplies. This may be appreciated from the statistic that, as about the mid-1980s, shipment of fluorescent lamps of all types was 300 million annually.1 From the introduction of the fluorescent lamp in 1938 until the late 1970s, fluorescent lamps were driven directly from the 60-Hz power line via a series inductor or via a 60-Hz...

T

From Eq. 4.11, primary circular mils requirement is (primary circular mils) 500 X 2.7 1350 circular mils This calls for No. 19 wire of 1290 circular mils, which is close enough. From Eq. 4.12, secondary rms current is and from Eq. 4.12, the required number of circular mils is 500 X 21 10,500. This calls for No. 10 wire, which, of course, is unpractically large in diameter. A foil winding or a number of smaller diameter wires in parallel with an equal total circular-mil area would be used....

Info

Buck Converter Waveforms with V 20V, L 50uH Positive-to-Negative Converter with 5V Output Positive-to-Negative Converter with 5V Output t Lower reverse voltage rating may be used for lower input voltages. Lower current rating is allowed for lower output current. See AN44. tt Lower current rating may be used for lower output current. See AN44. * * R1, R2, and C4 are used for loop frequency compensation with low input voltage, but R1 and R2 must be included in the calculation for output voltage...

Low InputVoltage Regulators for Laptop Computers and Portable Electronics

The explosion in the use of laptop computers and portable electronics in recent years has led to the formation of a new sector of the power conversion industry. This sector consists of low-input-voltage, battery-fed boost, buck, and polarity-inverting configurations (Sees. 1.3 to 1.5). They are almost entirely contained in one integrated-circuit (IC) package, and most require externally only a single inductor, capacitor, and diode plus about three to five small resistors. Since they operate at...

Mmmtmmmm mmmwmmwm mmmmmm

V R0 l P l,n Pln Efficiency 15.05 49.8 0.302 4.55 0.127 6.37 71.4 Top V (Q1)50V, 5 us cm V E V R0 l P l,n Pln Efficiency 15.05 49.8 0.302 4.55 0.127 6.37 71.4 v Ro lo po l n Pin Efficiency 18.08 49.8 0.363 6.56 0.151 9.03 72.7 v Ro lo po l n Pin Efficiency 18.08 49.8 0.363 6.56 0.151 9.03 72.7 Figure 6.24 Waveform in a current-fed Royer oscillator. By adding an inductor in series between Vcc and the transformer center tap, the high-current spikes at the start and end of the transistor on time...

Mp

. 4.19 A. . 2.31 A. . 0.95 A. . 0.49 A. . 0.20 A. Note step at start of ramp Note smaller step at start of ramp Note no step L0 has run dry Note much lower on time Note still lower on time (2) 1(01) 2 A, 10 p-S cm ldc- 4.4 A (3) l(Q1) -- 2 A, 10 (xs cm ldc - 2.30 A (4) l(Q1)-2 A, 10 (iS cm ldc- 0.95 A Figure 1.6 A 25-kHz buck regulator, showing the effect of the output inductor La running dry or moving from the continuous mode to the discontinuous mode. In panel (a), note that on time remains...

P V I

Current is a maximum for minimum voltage. Then again for lines under and over a term signifying the minimum and maximum values of the term, where I k is the peak 60-Hz input line current at Vrms. But it is seen in Fig. 15.12c that since the current averaged over one switching cycle is only one-half of Ipk,, then Ipk t must be 2Ipk or

Magnetics and Circuits Designs

Transformer and Magnetics Design 267 7.2 Transformer Core Materials and Geometries and Peak Flux 7.2.1 Ferrite core losses versus frequency and flux density for widely used core materials 268 7.2.2 Ferrite core geometries 271 7.2.3 Peak flux density selection 275 7.3 Maximum Transformer Core Output Power, Peal Flux Density, Core and Bobbin Areas, and Coil Current Density 277 7.3.1 Derivation of output power relations for forward 7.3.2 Derivation of output power relations for...

Power Factor Power Factor Correction

15.1 Power Factor What Is It and Why Must It Be Corrected The term power factor is borrowed from elementary AC circuit theory. When a sinusoidal AC power source feeds either an inductive or a capacitive load, the load current is also sinusoidal but lags or leads the input voltage by some angle x. For an rms input voltage V and rms input current , the apparent power taken from the line is VIr But the actual power delivered to the load is only ViIi cos x. It is only the component of input current...

R

* Coiltronics CTX62-2-MP * * KRL SL-1-C1-0R050J Figure 17.12 LIC1148 high-efficiency buck regulator with external MOSFETs. This regulator operates with affixed off time (set by Ct to ground). It regulates by varying switching frequency. The external P and N channel MOSFETs, with their low on drops, offer efficiencies exceeding 90 percent over a large current range.

R1

Figure 2.11 Critical secondary currents in forward converter. Each secondary has the characteristic ramp-on-a-step waveshape because of the fixed voltage across the output inductor and its constant inductance. Inductor current is the sum of the secondary plus the free-wheeling diode current. It ramps up and down about the DC output current. Primary current is the sum of all the ramp-on-a-step secondary currents reflected by their turns ratios into the primary. Primary current is then also at...

Ri

Figure 6.11 SCR resonant full bridge. This can deliver twice the output power of the half bridge. half those of the half bridge for equal output power. Hence only the half bridge will be discussed here in detail. The half bridge can be operated series-loaded as in Fig. 6.10 with the secondary load reflected via transformer T1 in series with a series resonant (C3 resonating with the series combination of L3 and LI when Ql is on or with the series combination of L3 and L2 when Q2 is on). In the...

S16

** Half-bridge driver requires external control circuit Battery-Powered DC DC Conversion Solutions Selection Guide The following tables are a short form component selection guide for a collection of commonly used battery-powered DC DC conversion applications. No design is required since inductor, capacitor and resistor values are completely specified. Choose the appropriate LTC DC DC converter for your application from the following tables. The LT1073, LT1107, LT1108, LT1110, LT1111, LT1173,...

S9b

Vin 120V, Vo 3.56 V fs S56klh, lo 4.2A 1st waveform Vgs(20VjDiv) 2nd waveform Vcr(20VjDiv) 3rd waveform Ip (1A Div) 4ih waveform Vds(100V Divj Figure 13.2 Measured waveforms on an actual circuit as Fig. 13.1. (Courtesy F. Lee and K. Liu) started rising shortly after the negative diode current (D2) has come back up again to zero as discussed above. It is also seen that the voltage across the secondary capacitor in waveform 2 (which is a replica of the voltage across the primary magnetizing...

Nsb

Figure 12.6 Gain G, sum of LC filter + modulator + output voltage sampling resistors) gains determines error-amplifier gain. Error-amplifier gain at Fca is made equal and opposite to loss of Gt. Error-amplifier gain slope at Fco is made horizontal with upward and downward breaks at Fz and Fp. Location of Fz and Fp in frequency determines total circuit phase margin. DC gain (LC filter + modulator + sampling resistors -G+ total gain (LC filter + modulator + j- I sampling resistors R1, R2 j 'esr...

T T T V T

V dc-'o 1 cr 1o y dc vf on) O O r7i and for Tcr Tvi Ts, P(Ton) VdcIQ(TJT). At turnoff as seen in Fig. 1.56, it is assumed that current hangs on at its maximum value Ia until the voltage has risen to its maximum value of Vdc in a time Tvr. Then current starts falling and reaches zero in a time Tcf. Total turnoff dissipation is then and for Tvr Tc T , P(Tott) VdcI0 TJT). Total AC losses (the sum of turnon plus turnoff losses) are then Total losses (the sum of DC plus AC losses) are P, Pdc + Pac...

Vd vdcmin

To avoid problems arising from T1 leakage inductance spikes, N2 is usually selected twice this minimum value.14 Thus 5.6.7.11 Output input voltage-on-time relation for overlapping-mode design at high DC input voltages where operation has been forced nonover-lapping. Now with selected from Eq. 5.15 and N2 from 5.16b, when Vdc is less than its nominal value, the relation between output voltage and on time is given by Eq. 5.14a. At nominal input Vdcn, D Ton T is 0.5 and at DC input voltages...

Vdo VtJTton xs

Thus, effectively, this current is being delivered at 100 percent duty cycle at a voltage of N(V0 + Vd) or at 102 V. Assuming an efficiency of 80 percent outward from the T1 center tap, input power at the center tap is 2000 0.8 or 2500 W. Average current into the center tap is then 2500 102 24.5 A. This is very closely the current at the center of the current ramp in Fig. 5.20g and 5.20h. Current in each T1 half primary is thus very closely approximated by an equivalent...

X

Figure 1.3 (a) Linear regulator with an NPN series pass transistor. If base drive is taken from Vdc via a resistor Rb, a minimum voltage or headroom must exist across Rb to supply inward-directed base current at the bottom of the input ripple triangle, (b) Linear regulator with a PNP series pass transistor. With a PNP series pass transistor, the required base current does not come from Vdc but flows outward from the base to the current amplifier Vdc is no longer restricted to a minimum of 2.5 V...

Ydcyea 04r0t

Or Vo (12.18) and the DC or low-frequency gain from the error-amplifier output to the output node is 12.16.2 Discontinuous-mode flyback transfer function or AC voltage gain from error-amplifier output to output voltage node Now assume a small sinusoidal signal of frequency fn inserted in series at the error-amplifier output point. This will cause a sinusoidal modulation in amplitude of the triangular current pulses (of peak amplitude Ip) in the T1 primary. Consequently, there is a sinusoidal...

V1

Figure 5.15 (a) Turn on snubber L2, D,., Rc eliminates turnon dissipation in Q5, but at the price of an equal amount of dissipation in Rc. When Q5 commences turning on, the presence of L2 drives the Q5 emitter up to within 1 V of its collector. As Q5 current rises toward I,, the current in L2 which has been stored in it by LI during the Q5 off time decreases to zero. Thus the voltage across Q5 during its turnon time is about 1 V rather VI V. During the next Q5 off time, L2 must be charged to a...

2500

Figure 6.5 Anode-to-cathode voltage fall time. Marconi ASCR type ACR25U characteristics. flow at an anode voltage in the vicinity of 25 V and dissipation would be high. Figure 6.5 also shows that if anode current pulses are half sinusoid, their base width should be longer than 2.5 xs to avoid an on anode potential greater than 5 V throughout the entire half sinusoid. Figures. 6.6 and 6.7 show maximum dV dt and tq for the Marconi ACR25U. 6.3 SCR Turnoff by Resonant Sinusoidal Anode Currents...

WQ 1 Vlcp

From Figs. 13.6 and 13.7, some of the problems with resonant converters can be seen. 13.4.3 Regulation with series-loaded half bridge in continuous-conduction mode (CCM) For a number of reasons, Steigerwald states that operating above the resonant peak (ARM) is preferable to below resonance. Figure 13.6 shows how the continuous conduction mode SRC half bridge regulates. If initial operation were at A at Q 2 at normalized frequency 1.3, the output input voltage ratio would be 0.6. Now if the...

Current Mode and Current Fed Topologies

Current-mode1-7 and current-fed9-20 topologies are grouped into one family despite their very significant differences. They are grouped together because they gain advantages by controlling both input current (although in different ways) and output voltage. Current mode (Fig. 5.3) has two feedback loops an outer one which senses DC output voltage and delivers a DC control voltage to an inner loop which senses peak power transistor currents and keeps them constant on a pulse-by-pulse basis. The...

132 Resonant Forward Converter

First the simplest resonant circuit, the resonant forward converter will be discussed primarily to see how it is arranged for transistor turnoff to occur at zero current and to see how critical the exact turnoff time may be. Figure 13.1 shows a simple resonant forward converter3 operating in the discontinuous mode. Discontinuous mode implies that current in the resonant LC circuit is not a continuous sine wave, but a sequence of a burst of one half or one full cycle of sine-wave current...

Uc3854 Schematic Diagram

Uc3854 Using Pfc Circuit

Figure 15.6 Regulation against load current changes in a continuous conduction mode boost converter. Figure 15.6 Regulation against load current changes in a continuous conduction mode boost converter. which is the previously mentioned Eq. 15.1. Now in Fig. 15.5a, output voltage regulation is achieved by chang ing Ton in accordance with Eq. 15.1 as Vin changes. This is done with the pulse width modulator (Fig. 15.5a). If Vin momentarily changes, so does Vo. A fraction of Vo ( Vea in) is sensed...

Half and Full Bridge Converter Topologies

Half- and full-bridge topologies subject their transistors in the off state to a voltage stress equal to the DC input voltage and not to twice that as do the push-pull, single-ended, and interleaved forward converter topologies. Thus the bridge topologies are used mainly in offline converters where twice the rectified DC would be more than the usual switching transistors could safely tolerate. Bridge topologies hence are almost always used where the nominal AC input voltage is 220 V or higher...

Is Lt1170 Substitute For Lt1070

* Package Options DIP Dual-ln-Line Package, SO Small Outline, SSOP Shrink Small-Outline Package, TO_ Can ** Temperature Ranges C 0 C to +70 C, E 40 C to +85 C, M -558C to +125 C t Prices provided are for design guidance and are POB USA. International prices will differ due to local duties, taxes, and exchange rates, tt Future product contact factory for pricing and availability. Specifications are preliminary. manufacturers' devices. This discrepancy is due only to the author's earlier...

334

And since the maximum duty cycle of this peak SCR current is tj 2i (min> 0.25 (Fig. 6.13a and 6.13c), the SCR rms current is Jrms(scR) 64.7 x V 25 V2 22.9 A. This is easily within 40 peak rms capability of the Marconi ACR25U. Also, as assumed above, the antiparallel diode peak current is one-fourth of the SCR current or 64.7 4 16.2 A. With a 1.62 turns ratio, the peak rectifier diode currents will be 104.8 and 26.2 A corresponding to the peak SCR and antiparallel diode currents. With such...

72

Figure 17.6 Power switch on voltage, LT1170 boost regulator. It is the on dissipation (VonIonTon T) rather than the peak current rating which determines how much peak current may be drawn. Attempting to operate at the device peak current rating may result in requiring a heat sink very much greater than the device package itself. Figure 17.6 Power switch on voltage, LT1170 boost regulator. It is the on dissipation (VonIonTon T) rather than the peak current rating which determines how much peak...

02

01.02 Q1.Q2 Q1, Q2 Q1, Q2 Figure 2.13 Double-ended forward converter. Transistors Q1 and Q2 are turned on and off simultaneously. Diodes Dl and D2 keep the maximum off voltage stress on Ql, Q2 at a maximum of Vdc as contrasted with 2Vdc plus a leakage spike for the single-ended forward converter of Fig. 2.10. Although there are a number of bipolar transistors with Vccv ratings up to 650 and even 850 V which can take that stress, it is a far more reliable design to use the double-ended forward...