Preregulator Board Configuration

The Power Input circuit converts the input ac-source voltage to filtered dc for use by the Preregulator.

The POWER switch (S901) connects the ac-supply source through fuse F901 to bridge rectifier CR904. The bridge full-wave rectifies the source voltage, and its output is filtered by C909. Input surge current at the time of instrument power-up is limited by thermistors RT901 and RT902. Initially their resistances are high, but as they warm up, their resistances decrease and they dissipate less power. The instrument is protected from large voltage transients by suppressor VR901. Conducted EMI is attenuated by line filter FL9001, common-mode transformer T901, differential-mode transformer T907, and capacitors C901, C903, C904, and C905. Capacitors C907, C908, and C910 form a high-frequency bypass network to prevent the diodes in CR904 from generating EMI.

The Preregulator provides a regulated dc-output voltage for use by the Inverter circuitry.

When the instrument is turned on, voltage developed across C909 will charge C913 through R911. When the voltage has risen to a level high enough that U920 can reliably drive Q933, U920 will receive its Vcc voltage through Q915. This level is set by zener diode VR917 in the emitter circuit of Q917 and by the voltage divider consisting of R912 and R913. The zener diode will keep Q917 off until the voltage at its base reaches approximately 6.9V. Then

Q917 will be biased into its active region and the resulting collector current will cause a voltage drop across R916. This voltage drop will bias on Q915, and the positive feedback through R914 will reinforce the turn-on of Q917. Thus Q915 and Q917 will drive each other into saturation very quickly. Once Q915 is on, U920 will begin to fucntion.

Pulse-width modulator IC U920 controls the output voltage of the Preregulator by regulating the duty cycle of the pulse applied to the gate of Q933. It utilizes an oscillator whose frequency is determined by R920 and C920 (approximately 40 kHz) and whose output at pin 5 is a sawtooth voltage. An internal comparator compares this sawtooth voltage with the output voltage produced by the two error amplifiers. Whenever the sawtooth voltage is greater than the error-amplifier output voltage, Q933 is biased on to supply current to both C934 and the rest of the circuitry. The two error amplifiers are used to maintain a constant output voltage and to monitor the output current of the Preregulator. One input of each amplifier is connected through a divider network to the internal +5V reference. The output voltage of the Preregulator is monitored by the voltage divider at pin 2. The voltage drop across R933, produced by the Preregulator output current, is applied to the current-limit amplifier via R929.

When the instrument is first turned on, the current limit amplifier controls the conduction time of Q933. While Q933 is conducting, the output current increases until a sufficiently large voltage drop is developed across R933 to invoke the current limit mode. The current-limit amplifier holds the output current to the current-limit threshold at approximately 1 ampere. When the voltage across C934 reaches approximately 43V, the voltage amplifier starts controlling the duty cycle of Q933 and the Preregulator will not limit current unless there is excessive current demand.

With Q933 off, C933 charges to the output voltage of the Power Input circuit. When Q933 turns on, current through the FET will come from the winding connected to pins 1 and 2 of T933 and from C933. Current to C933 is supplied by the winding connected to pins 4 and 5 of T933. When U920 shuts off Q933, the collapsing magnetic field will raise the voltage at the anode of CR933. This diode then becomes forward biased and passes current supplied by the winding connected to pins 1 and 2 of T933. This process will continue for each period of the oscillator, and the duty cycle will be altered as necessary to maintain 43V across C934. To shut off Q933 during each oscillator period, Q931 is used to discharge the gate-drain capacitance. Pin 10 of U920 goes LO, reverse biasing CR931 and turning on Q931 to effectively short together the gate and source, thus shutting off the FET.

Once the supply is running, power to U920 will be supplied from the winding connected to pins 6 and 7 of T933. Diode CR913 half-wave rectifies the voltage across pins 6 and 7 to keep filter capacitor C913 charged and to maintain Vcc voltage to U920 through Q915.

Instrument protection from excessive output voltage is supplied by silicon-controlled rectifier Q935. Should the Preregulator output voltage exceed 51V, zener diode VR935 will conduct, causing Q935 to also conduct. The Preregulator output current will then be shunted through Q935, and the output voltage will very quickly go to zero. With the Vcc voltage of U920 no longer being supplied by the winding connected to pins 6 and 7 of T933, the Preregulator will shut down and Q935 will be reset. The supply will then attempt to power up, but will again shut down once the overvoltage condition is reached. This sequence continues until the overvoltage condition is corrected.

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