2 Circuit Description

The following description will be given assuming that Vbe of transistor is 0.7V.

This circuit is composed of the emitter follower Q945, full feedback unit gain amplifier Q946 - Q950, and the current source circuit of sub bright for Q951 - Q953. The circuit operates to vary only the DC level of the input signal and develops the signal with only the DC level shifted from the input signal at Q949. The shift level is determined by the current flowing into R976.

When a triangular waveform of 2.3V - 3.6V shown in Fig. 4-2 is input, a triangular waveform of 3.0 - 4.3V appears at the base of Q946. At the same time, a triangular waveform of approx. 3.0V - 4.3V also appears at the base of Q948.

Assuming the sub brightness adjustment voltage at Q953 is 1.83 Vdc, a current of (1.83V - 0.7V)/(220 + 15) = 4.97 mA flows into Q951 and Q950, and this current also flows into R976. Therefore, the emitter voltage of Q949 develops 1.06V higher than the base voltage of Q948 as shown in the equation; 4.8 mA x 220W = 1.06V. And the triangular waveform of 4.06V - 5.36V appears at the emitter of Q949.

Q945

Q945

Fig. 4-2 Level shifter circuit

Fig. 4-2 Level shifter circuit

The circuit consists of a current source consisting of R983, R984, Q954, full feedback amplifier Q955 - Q960, the gain variation circuit Q961 - Q963 and R991. (The circuit including Q955 - Q963 is called the gamma circuit.)

A current of (12.7V - 0.7V)/(1.3 kW + 15W) = 9.15 mA is flown into the current source for Q954 and the same current is also flown into Q956 (Q947). At the same time, a current of 9.15 mA x (15/20) = 6.9 mA is flown into Q960. The followings are described referring to Fig. 4-3. The signal from the level shifter is supplied to the base of Q955. If the device elements and currents of Q955 and Q957 are exactly the same, the base state of Q955 is same as that of Q957. However, Q955 and Q957 are not paired in their characteristics, the actual base state will be different. The base state of Q957 is described by referring to the triangular waveform of 4.06V - 5.36V.

5.36V

When the base of Q963 develops 3.55 Vdc, the emitter of Q961 develops 4.25 Vdc. in the signal area where the base of Q963 is higher than 4.25V, the current of 7.7 mA is flown into R988 because of Q961 turned off, and the emitter voltage of Q956 increases by amount of 1.7V, 7.7 mA x 220W = 1.7V, from the base of Q957. As the base voltage of Q957 is close to 4.25V, Q961 turns on and the current is flown into the collector of Q960 through R991. When the base voltage of Q957 develops 4.06V, the current flowing into R991 is 2.8 mA, (4.25V - 4.06V)/68 = 2.8 mA. The current flowing into R998 decreases by that amount and the voltage shifting amount also decreases by the same amount, 2.8 mA x 220W = 0.62V. The operation is shown in Fig. 4-4.

Q956

7.06V

5.14V

Q961

5.36V

4.25V

9.15 mA

Fig. 4-3 Gamma circuit r1004

Q962 q9 6

4.25V

Q963

Q962 q9 6

Q963

9.15 mA

Fig. 4-3 Gamma circuit

Q957 Base voltage

Q957 Base voltage

Q956 Emitter voltage

7.06V

Q956 Emitter voltage

Fig. 4-4 Gamma circuit operation

Fig. 4-4 Gamma circuit operation

2-3. Level Shifter Circuit (Q965 - Q968, R1044)

Q965 - Q967 works as a current source. Assuming that the base voltage of Q965 is 1.76 Vdc, the current 4.2 mA is flown into Q967 and the same current also flown into Q968. The current and R1044 make a voltage drop and only the DC level is shifted.

2-4. Black Limiter (Q969, Q970)

The black limiter is a switching circuit and its operation is as follows. When the base voltage of Q969 is higher than that of Q970, Q969 turns on and when the base voltage of Q969 is lower than that of Q970, Q969 turns off and Q970 turns on.

2-5. Inverted Signal Amplifiers (Q974 - Q981)

• Q974, Q975: Emitter follower

• Q976 - Q978: Inverted signal amplifier

The op. amplifier is composed of Q976 - Q978. Q977 base accepts an inverted input and Q978 normal input. For easy understanding of the op. amplifier, an op. amplifier shown in Fig. 4-5 will be refferred.

R1018

Q975 Emitter

Q978 Base

R1017 1k

Q977 Collector

Q975 Emitter

Q978 Base

R1017 1k

Q977 Collector

2-6. Switch Circuit (Q982 pPD74HC4066A)

The normal and inverted signal outputs are switched for every horizontal and vertical period. The signal is inverted for one horizontal period and then further inverted for one vertical period.

Q982

Normal input signal Output signal R1025

TP905

Inverted input signal

Fig. 4-7 SW circuit operation

¡Inverted phase rLTLTL

The signal is inverted for one horizontal period and then further inverted for one vertical period.

Fig. 4-7 SW circuit operation

The output of Q977 is 7V x (1 + R1018/R1017) - 4V = 10V, so 7V x (1 + R1018/R1017) - 6V = 8V is output. (The constant of R1017 is assumed to 1 kW , in considering the internal emitter resistor of Q975.) Accordingly, the output shown in Fig. 4-6 is obtained.

6V Q977

Collector output

Fig. 4-6 Reverse output operation

2-7. Sample & Hold Circuit

The block diagram of the circuit is shown in Fig. 4-10 and its connection diagram is shown in Fig. 4-11. As shown in the block diagram in Fig. 4-9, 6CH, each consisting of the level shifter, S/H (sample and hold) and driver circuits, are contained in CXA2504N.

Each sample & hold operation is carried out on pins 18, 19, 20, 1, 2 & 3 and the re-sample & hold operations for 6CH are carried out together on pins 21 and 40. This means that the serial data is converted to the parallel data and the LCD panel operation frequency is lowered.

Re-sample & hold

Re-sample & hold

Fig. 4-9 Sample & hold operation

SH4 SH5 SH6

BIAS IN56 IN6 IN5

BIAS IN34 IN4 GND GND GND Vcc1 IN3

BIAS IN12 IN2 IN1 I SH SH1 SH2 SH3

Fig. 4-10 CXA2504N block diagram

Re-sample & hold pulse input

Re-sample & hold pulse input

pulse input

Fig. 4-11 Peripheral circuit of sample & hold circuit pulse input

Fig. 4-11 Peripheral circuit of sample & hold circuit

2-8. LCD Panel

The LCD panel uses the active matrix panel with 3.3 cm in diagonal length and a built in driver made of the super thin film multi-crystal silicone transistor. Use of 3 panels enables to display in full color mode. The pixels are arranged in square form which is adequate for the data projection use. This realizes to display figures and characters clearly. Also, use of a high luminance screen employing the advanced on-chip black matrix and a built-in cross-talk free circuit provides a high screen quality with less cross-talk. The poly-silicone TFT high speed scanner is used and up/ down and left/right inversion function is provided. Furthermore, use of 5 V system interface circuit realizes a low voltage consumption for the timing and control signals.

2-8-1. Features

• Number of dots displayed: 519,000 dots in diagonal length of 3.3 cm (1.3 type)

• High transparent ratio: 20%

• Built-in cross-talk free circuit

• High contrast ratio in normally white mode: 200 (Standard)

• Built-in H, V driver (Built-in input level conversion circuit, 5V driving possible)

• Up/down and left/right inversion display function 2-8-2. Element component

• Active matrix panel with the driver using multi-crystal silicone transistors

The block diagram of the LCD panel is shown in Fig. 4-12 and terminal description is in Table 4-1.

Fig. 4-12 Liquid crystal panel block diagram

¡13

HST

HCK1

©

HCK2

©

BLK

®

RGT

¡20

VST

VCK

PCG

DWN

@

ENB

12

MODE1

11

MODE2

MODE3

HVdd

¡23

VVdd

M6)

VSS

7)

SIG1

c5)

SIG2

(3)

SIG3

2

SIG4

(4)

SIG5

SIG6

£4)

COM

Fig. 4-12 Liquid crystal panel block diagram

The liquid crystal panel is provided with a built in display area variable circuit inside the liquid crystal panel. It is possible to correspond with each signal of MAC16/SVGA/ VGA/PC98/NTSC/WIDE/PAL. The mode switching described above is carried out owing to the signal developed at pins 10 to 12 of the display area switch input terminal as shown in Fig. 4-13. The area not displayed (shaded portions in Fig. 4-13) is written by PSIG signal of pin 1.

Macintosh 16 MODE (MODE1=L, MODE2=L, MODE3=L)

DISPLAY

AREA 800 x 600

Macintosh 16 MODE (MODE1=L, MODE2=L, MODE3=L)

SVGA MODE (MODE1=L, MODE2=L, MODE3=H)

VGA/NTSC MODE (MODE1=L, MODE2=H, MODE3=H)

VGA/NTSC MODE (MODE1=L, MODE2=H, MODE3=H)

WIDE MODE (MODE1=H, MODE2=L, MODE3=H)

WIDE MODE (MODE1=H, MODE2=L, MODE3=H)

Table 4-1 Liquid crystal panel terminal description

Pin No.

Symbol

Description

Pin No.

Symbol

Description

1

PSIG

Uniformity improvement signal input terminal

11.5v

13

HST

Start pulse input terminal for H shift resistor driving

2

SIG4

Video signal 4 input terminal to LCD panel, 7V center ± 4.5 V max.

14

HCK1

Clock input terminal for H shift resistor driving

3

SIG3

Video signal 3 input terminal to LCD panel

15

HCK2

Clock input terminal for H shift resistor driving

4

SIG5

Video signal 5 input terminal to LCD panel

16

Vss

GND terminal for H, V drivers, GND

5

SIG2

Video signal 2 input terminal to LCD panel

17

BLK

External frame display pulse input terminal

6

SIG6

Video signal 6 input terminal to LCD panel

18

ENB

Enable input terminal for gate selection pulse

7

SIG1

Video signal 1 input terminal to LCD panel

19

VCK

Clock input terminal for V shift resistor driving

8

HVdd

Power supply input terminal for H driver, 15.5V

20

VST

Start pulse input terminal for V shift resistor driving

9

RGT

Driving direction input terminal for H shift resistor (H: Normal direction, L: Reverse direction)

21

PCG

Uniformity improvement pulse input terminal

10

MODE3

Display area SW 3 input terminal

22

DWN

Driving direction input terminal for V shift resist or (H: Normal direction, L: Reverse direction)

11

MODE2

Display area SW 2 input terminal

23

VVDD

Power supply input terminal for V driver, 15.5V

12

MODE1

Display area SW 1 input terminal

24

COM

Counter power supply voltage input terminal for LCD panel, 6.6 VDC

SECTION V MICROCOMPUTER

0 0

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